A low-power current mode bipolar frequency divider is discussed. Low-power consumption is achieved owing to the design strategy being based on a progressive reduction of bias currents through stages without affecting divider operation speed. The strategy is independent of the process used and simple to design. avoiding the trial-and-error approach based on simulations.
Design of low-power high-speed bipolar frequency dividers
DI CATALDO, Giuseppe;PALUMBO, Gaetano
2002-01-01
Abstract
A low-power current mode bipolar frequency divider is discussed. Low-power consumption is achieved owing to the design strategy being based on a progressive reduction of bias currents through stages without affecting divider operation speed. The strategy is independent of the process used and simple to design. avoiding the trial-and-error approach based on simulations.File in questo prodotto:
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