Robust design of CMOS amplifiers oriented to settling-time specification

In this paper, we propose a new approach for the robust design of complementary metal-oxide-semiconductor amplifiers based on settling-time specifications. The approach is based on the definition of the separation factors and on the analysis of their role in the settling time. We define a design strategy for being certain that an OTA satisfies the settling-time constraint under any statistical variation of process or design parameters. The proposed strategy is applied to the transistor level design of a two-stage amplifier and a three-stage one. Simulation results, in good agreement with theory, confirm the validity of the proposed approach.