In this paper a new integrated Chua's circuit is implemented through switched-capacitor techniques. Recent studies on complex systems made of vast arrays or matrices of Chua's cells motivate the need for experimental verifications which could be easily accomplished by an integrated version of the array. Design efforts have been devoted to the reduction of the chip area consumption. The cell layout, realized in CMOS technology, is presented and experimental results confirm the validity of our chip implementation. The implementation presented allows the user to generate a wide gallery of complex behaviors. The system is in fact programmable: both the chaotic attractor generated by the single cell and the frequency range of the chaotic oscillations can be easily set via external control pins.

An integrated chua's cell for the implementation of a Chua's array

ARENA, Paolo Pietro;S. CASTORINA;FORTUNA, Luigi;FRASCA, MATTIA;
2004-01-01

Abstract

In this paper a new integrated Chua's circuit is implemented through switched-capacitor techniques. Recent studies on complex systems made of vast arrays or matrices of Chua's cells motivate the need for experimental verifications which could be easily accomplished by an integrated version of the array. Design efforts have been devoted to the reduction of the chip area consumption. The cell layout, realized in CMOS technology, is presented and experimental results confirm the validity of our chip implementation. The implementation presented allows the user to generate a wide gallery of complex behaviors. The system is in fact programmable: both the chaotic attractor generated by the single cell and the frequency range of the chaotic oscillations can be easily set via external control pins.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11769/4164
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