In this paper, an innovative converter topology is presented that allows to improve the performance of electronically commutated motor drives, aimed to equip home appliances. The proposed topology is based on a modified C-dump converter configuration, where the energy recovery stage acts as an active power factor controller (PFC) for offline operation. This is made possible by introducing a new technique to manage the free-wheeling energy that is recovered back to the dc bus by a suitable high frequency (HF) transformer. The proposed approach allows to omit the PFC stage that is included in motor drives devoted to home appliance applications in order to comply with power quality requirements. Moreover, the proposed converter topology features only low side or high side configuration switches, allowing to simplify the design of the drive and easily integrate the power semiconductors in a single chip exploiting smart power technologies. Simulations and experimental results confirm the validity of the proposed approach.

Single Chip Integration for Motor Drive Converters with Power Factor Capability

CACCIATO, MARIO;
2004-01-01

Abstract

In this paper, an innovative converter topology is presented that allows to improve the performance of electronically commutated motor drives, aimed to equip home appliances. The proposed topology is based on a modified C-dump converter configuration, where the energy recovery stage acts as an active power factor controller (PFC) for offline operation. This is made possible by introducing a new technique to manage the free-wheeling energy that is recovered back to the dc bus by a suitable high frequency (HF) transformer. The proposed approach allows to omit the PFC stage that is included in motor drives devoted to home appliance applications in order to comply with power quality requirements. Moreover, the proposed converter topology features only low side or high side configuration switches, allowing to simplify the design of the drive and easily integrate the power semiconductors in a single chip exploiting smart power technologies. Simulations and experimental results confirm the validity of the proposed approach.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11769/4391
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