A design procedure for high-order continuous-time intermediate-frequency band-pass filters based on the cascade of low-Q biquadratic cells is presented. The approach is well suited for integrated-circuit fabrication, as it takes into account the maximum capacitance spread dictated by the available technology and maximum acceptable sensitivity to component variations. A trade-off between noise and maximum linear range is also met. A novel, wide-tuning-range transconductor topology is also described. Based on these results, a 10-pole band-pass filter for a code division multiple-access satellite receiver has been designed and tested. The filter provides tunable center frequency (f(0)) from 10 to 70MHz and exhibits a 28-MHz bandwidth around f(0)=70MHz with more than 39-dB attenuation at f(0)/2 and 2f(0). Third-order harmonic rejection is higher than 60dB for a 1-Vpp 70-MHz input, and equivalent output noise is lower than 1mV(rms). The circuit is fabricated in a 0.25-mu m complementary metal oxide semiconductor process, and the core consumes 12mA from a 2.5-V supply, offering the best current/pole ratio figure. The die area resulted to be 0.9x1.1mm(2).
High-tuning-range CMOS band-pass IF filter based on a low-Q cascaded biquad optimization technique
PENNISI, Salvatore;
2015-01-01
Abstract
A design procedure for high-order continuous-time intermediate-frequency band-pass filters based on the cascade of low-Q biquadratic cells is presented. The approach is well suited for integrated-circuit fabrication, as it takes into account the maximum capacitance spread dictated by the available technology and maximum acceptable sensitivity to component variations. A trade-off between noise and maximum linear range is also met. A novel, wide-tuning-range transconductor topology is also described. Based on these results, a 10-pole band-pass filter for a code division multiple-access satellite receiver has been designed and tested. The filter provides tunable center frequency (f(0)) from 10 to 70MHz and exhibits a 28-MHz bandwidth around f(0)=70MHz with more than 39-dB attenuation at f(0)/2 and 2f(0). Third-order harmonic rejection is higher than 60dB for a 1-Vpp 70-MHz input, and equivalent output noise is lower than 1mV(rms). The circuit is fabricated in a 0.25-mu m complementary metal oxide semiconductor process, and the core consumes 12mA from a 2.5-V supply, offering the best current/pole ratio figure. The die area resulted to be 0.9x1.1mm(2).File | Dimensione | Formato | |
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cta.2027-High-tuning-range CMOS band-pass IF filter.pdf
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