Sfoglia per Autore
A reconfigurable parallel architecture for a fuzzy processor
file da validare1994-01-01 Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A; Vita, L.
A HIGH LEVEL HARDWARE MODEL FOR A PARALLEL FUZZY PROCESSOR
file da validare1994-01-01 Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A.
Design issues of an asynchronous parallel fuzzy processor
file da validare1995-01-01 Catania, Vincenzo; Ascia, Giuseppe; Vita, L.
An efficient hardware architecture to support complex fuzzy reasoning
file da validare1995-01-01 Ascia, Giuseppe; Catania, Vincenzo
Design of a VLSI Fuzzy Processor for ATM Traffic Sources Management
file da validare1995-01-01 Ascia, Giuseppe; Ficili, G; Panno, Daniela Giovanna Anna
A VLSI PARALLEL ARCHITECTURE FOR FUZZY EXPERT-SYSTEMS
1995-01-01 Ascia, Giuseppe; Catania, Vincenzo
Designing for Parallel Fuzzy Computing
1995-01-01 Ascia, Giuseppe; Catania, Vincenzo; Giacalone, B; Russo, Marco; Vita, L.
Design of a VLSI parallel processor for fuzzy computing
file da validare1995-01-01 Ascia, Giuseppe; Catania, Vincenzo
Design and Performance Evaluation of a VLSI Parallel Fuzzy Processor
file da validare1995-01-01 Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A; Riccobene, Salvatore Antonio
A Very High Speed Parallel Architecture for Fuzzy Applications
file da validare1995-01-01 Russo, Marco; Ascia, Giuseppe
A Parallel Architecture for Soft Computing
file da validare1995-01-01 Ascia, Giuseppe; Catania, Vincenzo; Russo, Marco
Rule-driven VLSI fuzzy processor
1996-01-01 Ascia, Giuseppe; Catania, Vincenzo; Russo, Marco; Vita, L.
AN EFFICIENT HARDWARE ARCHITECTURE TO SUPPORT COMPLEX FUZZY REASONING
1996-01-01 Ascia, Giuseppe; Catania, Vincenzo
A reconfigurable parallel architecture for a fuzzy processor
1996-01-01 Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A; Vita, L.
Design of a VLSI Hardware PET Decoder
file da validare1997-01-01 Ascia, Giuseppe; Catania, Vincenzo; Ficili, G.
A dedicated parallel processor for fuzzy computation
file da validare1997-01-01 Ascia, Giuseppe; Catania, Vincenzo
A VLSI fuzzy expert system for real-time traffic control in ATM networks
1997-01-01 Ascia, Giuseppe; Catania, Vincenzo; Ficili, G.; Palazzo, Sergio; Panno, Daniela Giovanna Anna
A Framework for a Parallel Architecture Dedicated to Soft Computing
file da validare1998-01-01 Ascia, Giuseppe; Catania, Vincenzo
A Parallel Processor Architecture for Real-Time Fuzzy Applications
file da validare1998-01-01 Ascia, Giuseppe; Catania, Vincenzo
A Data Dependent Approach to Instruction Level Power Estimation
file da validare1999-01-01 Ascia, Giuseppe; Sarta, D; Trifone, D.
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
A reconfigurable parallel architecture for a fuzzy processor | 1-gen-1994 | Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A; Vita, L. | file da validare |
A HIGH LEVEL HARDWARE MODEL FOR A PARALLEL FUZZY PROCESSOR | 1-gen-1994 | Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A. | file da validare |
Design issues of an asynchronous parallel fuzzy processor | 1-gen-1995 | Catania, Vincenzo; Ascia, Giuseppe; Vita, L. | file da validare |
An efficient hardware architecture to support complex fuzzy reasoning | 1-gen-1995 | Ascia, Giuseppe; Catania, Vincenzo | file da validare |
Design of a VLSI Fuzzy Processor for ATM Traffic Sources Management | 1-gen-1995 | Ascia, Giuseppe; Ficili, G; Panno, Daniela Giovanna Anna | file da validare |
A VLSI PARALLEL ARCHITECTURE FOR FUZZY EXPERT-SYSTEMS | 1-gen-1995 | Ascia, Giuseppe; Catania, Vincenzo | |
Designing for Parallel Fuzzy Computing | 1-gen-1995 | Ascia, Giuseppe; Catania, Vincenzo; Giacalone, B; Russo, Marco; Vita, L. | |
Design of a VLSI parallel processor for fuzzy computing | 1-gen-1995 | Ascia, Giuseppe; Catania, Vincenzo | file da validare |
Design and Performance Evaluation of a VLSI Parallel Fuzzy Processor | 1-gen-1995 | Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A; Riccobene, Salvatore Antonio | file da validare |
A Very High Speed Parallel Architecture for Fuzzy Applications | 1-gen-1995 | Russo, Marco; Ascia, Giuseppe | file da validare |
A Parallel Architecture for Soft Computing | 1-gen-1995 | Ascia, Giuseppe; Catania, Vincenzo; Russo, Marco | file da validare |
Rule-driven VLSI fuzzy processor | 1-gen-1996 | Ascia, Giuseppe; Catania, Vincenzo; Russo, Marco; Vita, L. | |
AN EFFICIENT HARDWARE ARCHITECTURE TO SUPPORT COMPLEX FUZZY REASONING | 1-gen-1996 | Ascia, Giuseppe; Catania, Vincenzo | |
A reconfigurable parallel architecture for a fuzzy processor | 1-gen-1996 | Ascia, Giuseppe; Catania, Vincenzo; Puliafito, A; Vita, L. | |
Design of a VLSI Hardware PET Decoder | 1-gen-1997 | Ascia, Giuseppe; Catania, Vincenzo; Ficili, G. | file da validare |
A dedicated parallel processor for fuzzy computation | 1-gen-1997 | Ascia, Giuseppe; Catania, Vincenzo | file da validare |
A VLSI fuzzy expert system for real-time traffic control in ATM networks | 1-gen-1997 | Ascia, Giuseppe; Catania, Vincenzo; Ficili, G.; Palazzo, Sergio; Panno, Daniela Giovanna Anna | |
A Framework for a Parallel Architecture Dedicated to Soft Computing | 1-gen-1998 | Ascia, Giuseppe; Catania, Vincenzo | file da validare |
A Parallel Processor Architecture for Real-Time Fuzzy Applications | 1-gen-1998 | Ascia, Giuseppe; Catania, Vincenzo | file da validare |
A Data Dependent Approach to Instruction Level Power Estimation | 1-gen-1999 | Ascia, Giuseppe; Sarta, D; Trifone, D. | file da validare |
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