A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500-Ω resistor it exhibits negligible even harmonic components whilst odd components are maintained well below -20 dB up to 900 mVpp of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.

A 1-V CMOS Output Stage with High Linearity

ALOISI, WALTER;GIUSTOLISI, Gianluca;PALUMBO, Gaetano
2003

Abstract

A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500-Ω resistor it exhibits negligible even harmonic components whilst odd components are maintained well below -20 dB up to 900 mVpp of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.
0-7803-7761-3
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/20.500.11769/112360
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