Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads

In this communication, we propose a new non-inverting class-AB CMOS output stage suitable for driving high-capacitive loads in three-stage amplifiers that make use of the Reversed Nested Miller technique for the frequency compensation. The output stage is verified through the design of a three-stage OTA suitable for driving a 500-pF capacitive load in a 65-nm CMOS process. The goodness of the proposed output stage is verified in the Cadence environment.