In this communication, we propose a new non-inverting class-AB CMOS output stage suitable for driving high-capacitive loads in three-stage amplifiers that make use of the Reversed Nested Miller technique for the frequency compensation. The output stage is verified through the design of a three-stage OTA suitable for driving a 500-pF capacitive load in a 65-nm CMOS process. The goodness of the proposed output stage is verified in the Cadence environment.
Titolo: | Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads |
Autori interni: | |
Data di pubblicazione: | 2018 |
Rivista: | |
Handle: | http://hdl.handle.net/20.500.11769/361604 |
ISBN: | 9781538648810 |
Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |
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08351164-Non-Inverting Class-AB CMOS Output Stage.pdf | Versione Editoriale (PDF) | Administrator |
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