FPGA-based design and implementation of a real time simulator of switched reluctance motor drives

The purpose of this work is to present an effective technical solution devoted to simulations of switched reluctance motor drives, which is designed and implemented on a Hardware In the Loop real time simulator that takes into account the nonlinear characteristics of the motor phase inductances and parameter variations. The proposed solution features low computational efforts and ensures high accuracy in the provided outcomes. The implemented model is verified by comparing the results achieved by the proposed solution with that obtained by a standard model-based design environment, assessing the simulation fidelity of the hardware in the loop simulation.