Dickson Voltage Multiplier: Beyond the Switching Limits

This work reports an accurate analysis of the dynamic behavior of the Dickson Voltage Multiplier (DVM), including the charge transfer limits. The achieved results show that, when operating in the Fast Switching Limit (FSL), the DVM is intrinsically inefficient in terms of settling time and power conversion. Indeed, an absolute minimum for the DVM intrinsic constant time, which occurs at the edge of the FSL zone, is demonstrated. Simulation results using SPICE and a 0.13- mu mathrm{m} CMOS technology confirm the theoretical analysis with an error lower than 14%.