A resistor-less CMOS reference generator exploiting transistors working in the subthreshold region is presented. Post-layout simulations using a 28-nm CMOS bulk technology show a temperature coefficient equal to 20.4 ppm/°C and a line sensitivity of 0.009 %/V, with an area occupation of only 156.42mu {m}2 and a nominal current consumption around 20nA. Thanks to the adoption of a configurable active load, the circuit leads to 6.9× lower process sensitivity across corners.

28-nm CMOS Resistor-Less Voltage Reference with Process Corner Compensation

Grasso A. D.
;
Pennisi S.;Venezia C.
Primo
2021

Abstract

A resistor-less CMOS reference generator exploiting transistors working in the subthreshold region is presented. Post-layout simulations using a 28-nm CMOS bulk technology show a temperature coefficient equal to 20.4 ppm/°C and a line sensitivity of 0.009 %/V, with an area occupation of only 156.42mu {m}2 and a nominal current consumption around 20nA. Thanks to the adoption of a configurable active load, the circuit leads to 6.9× lower process sensitivity across corners.
978-1-7281-8281-0
CMOS analog design
subthreshold circuit
variability-aware design
voltage reference
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/20.500.11769/521768
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