Fabrication of silicon carbide trenches by a inductively coupled plasma reactive ion etching process

In recent years, the production of microelectromechanical systems (MEMS) dramatically increased in response to the growing request of the newest generation of microelectronic devices employed for the manufacturing of smartphones, tablets, laptops, flexible electronics, and electric vehicles. The use of silicon chips in the new generation of power devices is limited because silicon shows low thermal and electrical conductivity coefficients that determine high power loss and low switching frequencies of the devices. Silicon Carbide (SiC) is a semiconductor employable for the fabrication of the next generation of microelectronic power devices, due to its excellent physico-chemical properties such as wide bandgap, high thermal conductivity, high chemical resistance, high breakdown electric field, high electron saturation velocity and high thermal resistance.1 Trench SiC metal-oxide-semiconductor field-effect transistor (MOSFETs) or U-MOSFETs, due to the U-shape of the trench, reduce the conduction and switching losses, compared to the existing planar SiC MOSFET. In the U-shape configuration, the gate electrode is buried into the trench, and this allows the elimination of the junction field-effect transistor (JFET) region that increases the current flow width, the channel density and reduces the electrical resistance. In addition, U-MOSFET can be fabricated in a smaller surface area than the planar MOSFET, since the MOS channel is oriented perpendicular to the surface. In fact, the cell pitch, that is the distance between two source terminals, is smaller with respect to the planar MOSFET configuration. These factors enable the increase of the number of devices packed in the same chip area.2-3 Therefore, the aim of this work was the production of silicon carbide trenches by SF6/O2/Ar/He an inductively coupled plasma reactive ion etching (ICP-RIE) process, using an interferometric algorithm to control both the end-point and trench depth. The fabrication process was characterized by suitable etch rate values, depth uniformity between the wafer centre and edge, absence of microtrenches and collateral contaminants, no crystallographic damage of the trench sidewalls, and low surface roughness. The morphological and structure characterization of the silicon carbide trench was investigated by scanning electron microscopy (SEM), transmission electron microscopy (TEM), atomic force microscopy (AFM), and X-ray photoelectron spectroscopy (XPS).