In this work, a three stage CMOS amplifier has been presented using a new frequency compensation network. This technique has been tried out for the first time where a cross feed forward compensation and impedance adaptation have been combined in order to avoid Miller capacitors. Small-signal analysis and mathematical verification are included to demonstrate the efficacy of the proposed circuit. The overall circuit is designed using a 65-nm CMOS technology which makes it very useful for low-power applications. It has been observed that this technique is suitable to handle large range of capacitive loads from 50 pF to 1 nF. The observed GBW, PM and average slew rate are 3.16-40 MHz, 51-63 and 0.274.1V/ µ s, respectively. The power consumption is 392.73 µ W and maximum supply volage is 1.2 V.

A compensation scheme for three-stage OTAs with no Miller capacitors

Grasso A. D.
Primo
2023-01-01

Abstract

In this work, a three stage CMOS amplifier has been presented using a new frequency compensation network. This technique has been tried out for the first time where a cross feed forward compensation and impedance adaptation have been combined in order to avoid Miller capacitors. Small-signal analysis and mathematical verification are included to demonstrate the efficacy of the proposed circuit. The overall circuit is designed using a 65-nm CMOS technology which makes it very useful for low-power applications. It has been observed that this technique is suitable to handle large range of capacitive loads from 50 pF to 1 nF. The observed GBW, PM and average slew rate are 3.16-40 MHz, 51-63 and 0.274.1V/ µ s, respectively. The power consumption is 392.73 µ W and maximum supply volage is 1.2 V.
2023
979-8-3503-0024-6
amplifier
bandwidth enhancement
feed-forward compensation
Frequency compensation
impedance adaptation
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11769/571352
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