Theoretical analysis of the resolution of a current-mode algorithmic analog-to-digital converter is presented in this paper. The non-ideal effects of current mirrors due to process tolerances have been taken into account. To support the analysis, a 4-bit ADC was realized in a 0.35-μm CMOS technology. Simulation results were found to be in excellent agreement with theoretical derivations.

Statistical analysis of the resolution in a current-mode ADC

GIUSTOLISI, Gianluca;PALUMBO, Gaetano;PENNISI, Salvatore
2002-01-01

Abstract

Theoretical analysis of the resolution of a current-mode algorithmic analog-to-digital converter is presented in this paper. The non-ideal effects of current mirrors due to process tolerances have been taken into account. To support the analysis, a 4-bit ADC was realized in a 0.35-μm CMOS technology. Simulation results were found to be in excellent agreement with theoretical derivations.
2002
0-7803-7596-3
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11769/73560
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