Algorithm for direct synthesis of formal specifications

In the last few years researchers have attempted to adopt a unified approach to the design of mixed hardware/software systems by using codesign techniques. In all the hardware/software codesign methods proposed there are usually four steps: specification of the system, testing and/or verification of the specification, partitioning and synthesis of the hardware and software parts. In this paper we deal with some of the problems concerning hardware synthesis in a hardware/software codesign methods we are developing. More specifically, we show how it is possible to translate a specification written in TTL (Templated T-Lotos), a description technique based on the CCS and CSP formal models, into a hardware device possessing the same properties as the original model.