Hardware in the loop for failure analysis in AC motor drives

The paper deals with an extensive experimental analysis of failures in ac motor drives exploiting a Hardware In the Loop (HIL) implementation. As many types of faults lead to stop the drive operation, a suitable approach for the realization of an appropriate test bench consists in the replacement of some hardware with an embedded system based on a FPGA board and high level graphical programming language. Such system is also used to evaluate different designs using FPGAs for both control systems and modeling of the electromechanical components. Two different numerical implementation concepts are considered: fixed point and single precision point. Differently than standard approach for FPGA programming, normally based on hardware description languages, the proposed method exploits an environment software platform with a high level abstraction that leads to obtain a good trade-off between accuracy and hardware resources also allowing a faster prototyping procedure. The proposed HIL approach has been used to study some common faults occurring on the inverter stage of a standard motor drive, evaluating the behavior of different control algorithms and their response in real-time.