In this communication, we propose a Miller compensation technique for low voltage LDO regulators which makes use of a current amplifier. The analysis shows how to design the compensation network when no voltage buffer is placed between the LDO error amplifier and power device and suggests a low supply voltage circuit topology that allows to compensate with a reasonably low integrated capacitance, to avoid oscillations due to the complex-conjugate poles at high output currents and to obtain acceptable under/overshoots during fast transient load variations. The designed LDO regulator can work with a supply voltage down to 1.2 V with a drop-out voltage of 200 mV at maximum load current of 100 mA; the integrated compensation capacitance is 25 pF, the load capacitor being equal to 1 muF. Simulations in good agreement with the theoretical results are also shown.
Low-voltage LDO Compensation Strategy based on Current Amplifiers
GIUSTOLISI, Gianluca;PALUMBO, Gaetano;
2008-01-01
Abstract
In this communication, we propose a Miller compensation technique for low voltage LDO regulators which makes use of a current amplifier. The analysis shows how to design the compensation network when no voltage buffer is placed between the LDO error amplifier and power device and suggests a low supply voltage circuit topology that allows to compensate with a reasonably low integrated capacitance, to avoid oscillations due to the complex-conjugate poles at high output currents and to obtain acceptable under/overshoots during fast transient load variations. The designed LDO regulator can work with a supply voltage down to 1.2 V with a drop-out voltage of 200 mV at maximum load current of 100 mA; the integrated compensation capacitance is 25 pF, the load capacitor being equal to 1 muF. Simulations in good agreement with the theoretical results are also shown.File | Dimensione | Formato | |
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C039 - Low-voltage LDO Compensation Strategy based on Current Amplifiers.pdf
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