Sfoglia per Autore
Power/Energy Perspective on Hyperblock Formation
file da validare2005-01-01 Ascia, G; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
Exploring Design Space of VLIW Architectures
file da validare2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
An Evolutionary Approach to Network on Chip Mapping Problem
2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Multi-objective Genetic Approach for System-level Exploration in Parameterized Systems-on-a-chip
2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Hyperblock Formation: A Power/Energy Perspective for High Performance VLIW Architectures
file da validare2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems
file da validare2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
The Hybrid Genetic Fuzzy C-Means: a Reasoned Implementation
file da validare2006-01-01 DI NUOVO, A.; Catania, Vincenzo; Palesi, Maurizio
An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design
file da validare2006-01-01 Giuseppe, Ascia; Vincenzo, Catania; DI NUOVO, A. G.; Palesi, Maurizio; Patti, Davide
A New Selection Policy for Adaptive Routing in Network on Chip
file da validare2006-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design
file da validare2006-01-01 Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures
file da validare2006-01-01 Palesi, Maurizio; Kumar, S; Holsmark, R.
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems
file da validare2006-01-01 Palesi, Maurizio; Holsmark, R; Kumar, S; Catania, Vincenzo
Genetic Learning of a Fuzzy C-Means Classifier System
2006-01-01 DI NUOVO, A.; Catania, Vincenzo; Palesi, Maurizio
Fuzzy Decision Making in Embedded System Design
2006-01-01 DI NUOVO, A. G.; Palesi, Maurizio; Patti, Davide; Ascia, Giuseppe; Catania, Vincenzo
Fuzzy Simulation to Speedup Computer Design
file da validare2006-01-01 Ascia, Giuseppe; Catania, Vincenzo; A., DI NUOVO; Palesi, Maurizio; Patti, Davide
An Hybrid Soft Computing Approach for Automated Computer Design
file da validare2006-01-01 DI NUOVO, A.; Palesi, Maurizio; Patti, Davide
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks
2006-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
2006-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions
file da validare2006-01-01 Holsmark, R; Palesi, Maurizio; Kumar, S.
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design
file da validare2006-01-01 Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
Power/Energy Perspective on Hyperblock Formation | 1-gen-2005 | Ascia, G; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
Exploring Design Space of VLIW Architectures | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
An Evolutionary Approach to Network on Chip Mapping Problem | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | |
Multi-objective Genetic Approach for System-level Exploration in Parameterized Systems-on-a-chip | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | |
Hyperblock Formation: A Power/Energy Perspective for High Performance VLIW Architectures | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
The Hybrid Genetic Fuzzy C-Means: a Reasoned Implementation | 1-gen-2006 | DI NUOVO, A.; Catania, Vincenzo; Palesi, Maurizio | file da validare |
An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design | 1-gen-2006 | Giuseppe, Ascia; Vincenzo, Catania; DI NUOVO, A. G.; Palesi, Maurizio; Patti, Davide | file da validare |
A New Selection Policy for Adaptive Routing in Network on Chip | 1-gen-2006 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design | 1-gen-2006 | Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide | file da validare |
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures | 1-gen-2006 | Palesi, Maurizio; Kumar, S; Holsmark, R. | file da validare |
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems | 1-gen-2006 | Palesi, Maurizio; Holsmark, R; Kumar, S; Catania, Vincenzo | file da validare |
Genetic Learning of a Fuzzy C-Means Classifier System | 1-gen-2006 | DI NUOVO, A.; Catania, Vincenzo; Palesi, Maurizio | |
Fuzzy Decision Making in Embedded System Design | 1-gen-2006 | DI NUOVO, A. G.; Palesi, Maurizio; Patti, Davide; Ascia, Giuseppe; Catania, Vincenzo | |
Fuzzy Simulation to Speedup Computer Design | 1-gen-2006 | Ascia, Giuseppe; Catania, Vincenzo; A., DI NUOVO; Palesi, Maurizio; Patti, Davide | file da validare |
An Hybrid Soft Computing Approach for Automated Computer Design | 1-gen-2006 | DI NUOVO, A.; Palesi, Maurizio; Patti, Davide | file da validare |
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks | 1-gen-2006 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | |
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip | 1-gen-2006 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | |
Deadlock Free Routing Algorithms for Mesh Topology NoC Systems with Regions | 1-gen-2006 | Holsmark, R; Palesi, Maurizio; Kumar, S. | file da validare |
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design | 1-gen-2006 | Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide | file da validare |
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