Sfoglia per Autore
Digital Pseudo-Random Bit Generators Based on Chaotic Maps
file da validare2003-01-01 Grasso, ALFIO DARIO; R., Mita; Palumbo, Gaetano
FPGA-based Implementation of CT and DT Multi-Layer CNNs
file da validare2004-01-01 Grasso, ALFIO DARIO; R., Mita; Palumbo, Gaetano
Optimised design of ECL gates with power constraint
2004-01-01 Alioto, M; Grasso, ALFIO DARIO; A. D, Palumbo
A Symbolic Analysis Tool of Linear Circuits in Matlab (SALCIM)
file da validare2005-01-01 Grasso, ALFIO DARIO; Pennisi, Salvatore
CMOS CLASS AB SINGLE-TO-DIFFERENTIAL TRANSCONDUCTOR
file da validare2005-01-01 Grasso, ALFIO DARIO; Pennisi, Salvatore
HIGH-PERFORMANCE CMOS PSEUDO-DIFFERENTIAL AMPLIFIER
file da validare2005-01-01 Grasso, ALFIO DARIO; Pennisi, Salvatore
Optimized Design of ECL Gates with a Power Constraint
file da validare2005-01-01 Grasso, ALFIO DARIO; Palumbo, Gaetano
Current-Steering D/A Converter Based on Triple Tail Cell
file da validare2005-01-01 Grasso, ALFIO DARIO; Pennisi, Salvatore
Improved Binary DAC Architecture Using the Triple-Tail Cell
file da validare2006-01-01 Grasso, ALFIO DARIO; Mirabella, C; Pennisi, Salvatore
A Design Procedure for Three-Stage OTAs
file da validare2006-01-01 S. O., Cannizzaro; Grasso, ALFIO DARIO; R., Mita; Palumbo, Gaetano; Pennisi, Salvatore
Three-stage CMOS OTA for large capacitive loads with efficient frequency compensation scheme
2006-01-01 Grasso, ALFIO DARIO; Palumbo, Gaetano; Pennisi, Salvatore
Power-Delay Optimized Design of Cascaded ECL Gates
file da validare2006-01-01 Grasso, ALFIO DARIO; Palumbo, Gaetano; Alioto, M.
Reversed Double Pole-Zero Cancellation Frequency Compensation Technique for Three-Stage Amplifiers
2006-01-01 Grasso, ALFIO DARIO; Marano, Davide; Palumbo, Gaetano; Pennisi, Salvatore
Design of cascaded ECL gates with power constraint
2006-01-01 Alioto, M; Grasso, A. D.; Palumbo, G
ACTIVE REVERSED NESTED MILLER COMPENSATION FOR THREE-STAGE AMPLIFIERS
file da validare2006-01-01 Grasso, A. D.; Palumbo, Gaetano; Pennisi, Salvatore
Design procedures for three-stage CMOS OTAs with nested-Miller compensation
2007-01-01 Cannizzaro, S. O.; Grasso, ALFIO DARIO; Mita, R; Palumbo, Gaetano; Pennisi, Salvatore
CMOS current-steering DAC architectures based on the triple-tail cell
2007-01-01 Grasso, ALFIO DARIO; C. A., Mirabella; S., Pennisi
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier
2007-01-01 Giustolisi, Gianluca; Grasso, ALFIO DARIO; Pennisi, Salvatore
Advances in Reversed Nested Miller Compensation
2007-01-01 Grasso, ALFIO DARIO; Palumbo, Gaetano; Pennisi, Salvatore
Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor
2007-01-01 Grasso, ALFIO DARIO; Marano, Davide; Palumbo, Gaetano; Pennisi, Salvatore
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Digital Pseudo-Random Bit Generators Based on Chaotic Maps | 1-gen-2003 | Grasso, ALFIO DARIO; R., Mita; Palumbo, Gaetano | file da validare |
| FPGA-based Implementation of CT and DT Multi-Layer CNNs | 1-gen-2004 | Grasso, ALFIO DARIO; R., Mita; Palumbo, Gaetano | file da validare |
| Optimised design of ECL gates with power constraint | 1-gen-2004 | Alioto, M; Grasso, ALFIO DARIO; A. D, Palumbo | |
| A Symbolic Analysis Tool of Linear Circuits in Matlab (SALCIM) | 1-gen-2005 | Grasso, ALFIO DARIO; Pennisi, Salvatore | file da validare |
| CMOS CLASS AB SINGLE-TO-DIFFERENTIAL TRANSCONDUCTOR | 1-gen-2005 | Grasso, ALFIO DARIO; Pennisi, Salvatore | file da validare |
| HIGH-PERFORMANCE CMOS PSEUDO-DIFFERENTIAL AMPLIFIER | 1-gen-2005 | Grasso, ALFIO DARIO; Pennisi, Salvatore | file da validare |
| Optimized Design of ECL Gates with a Power Constraint | 1-gen-2005 | Grasso, ALFIO DARIO; Palumbo, Gaetano | file da validare |
| Current-Steering D/A Converter Based on Triple Tail Cell | 1-gen-2005 | Grasso, ALFIO DARIO; Pennisi, Salvatore | file da validare |
| Improved Binary DAC Architecture Using the Triple-Tail Cell | 1-gen-2006 | Grasso, ALFIO DARIO; Mirabella, C; Pennisi, Salvatore | file da validare |
| A Design Procedure for Three-Stage OTAs | 1-gen-2006 | S. O., Cannizzaro; Grasso, ALFIO DARIO; R., Mita; Palumbo, Gaetano; Pennisi, Salvatore | file da validare |
| Three-stage CMOS OTA for large capacitive loads with efficient frequency compensation scheme | 1-gen-2006 | Grasso, ALFIO DARIO; Palumbo, Gaetano; Pennisi, Salvatore | |
| Power-Delay Optimized Design of Cascaded ECL Gates | 1-gen-2006 | Grasso, ALFIO DARIO; Palumbo, Gaetano; Alioto, M. | file da validare |
| Reversed Double Pole-Zero Cancellation Frequency Compensation Technique for Three-Stage Amplifiers | 1-gen-2006 | Grasso, ALFIO DARIO; Marano, Davide; Palumbo, Gaetano; Pennisi, Salvatore | |
| Design of cascaded ECL gates with power constraint | 1-gen-2006 | Alioto, M; Grasso, A. D.; Palumbo, G | |
| ACTIVE REVERSED NESTED MILLER COMPENSATION FOR THREE-STAGE AMPLIFIERS | 1-gen-2006 | Grasso, A. D.; Palumbo, Gaetano; Pennisi, Salvatore | file da validare |
| Design procedures for three-stage CMOS OTAs with nested-Miller compensation | 1-gen-2007 | Cannizzaro, S. O.; Grasso, ALFIO DARIO; Mita, R; Palumbo, Gaetano; Pennisi, Salvatore | |
| CMOS current-steering DAC architectures based on the triple-tail cell | 1-gen-2007 | Grasso, ALFIO DARIO; C. A., Mirabella; S., Pennisi | |
| High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier | 1-gen-2007 | Giustolisi, Gianluca; Grasso, ALFIO DARIO; Pennisi, Salvatore | |
| Advances in Reversed Nested Miller Compensation | 1-gen-2007 | Grasso, ALFIO DARIO; Palumbo, Gaetano; Pennisi, Salvatore | |
| Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor | 1-gen-2007 | Grasso, ALFIO DARIO; Marano, Davide; Palumbo, Gaetano; Pennisi, Salvatore |
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