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EnglishDesign procedures for three-stage CMOS operational transconductance amplifiers employing nested-Miller frequency compensation are presented in this paper. After describing the basic methodology on a Class-A topology, some modifications, to increase swing, slew-rate and current drive capability, are subsequently discussed for a Class-AB solution. The approaches developed are simple as they do not introduce unnecessary circuit constraints and yield accurate results. They are hence suited for a pencil-and-paper design, but can be easily integrated into an analog knowledge-based computer-aided design tool. Experimental prototypes, designed in a 0.35-mu m technology by following the proposed procedures, were fabricated and tested. Measurement results were found in close agreement with the target specifications.
| Titolo: | Design procedures for three-stage CMOS OTAs with nested-Miller compensation |
| Autori interni: | |
| Data di pubblicazione: | 2007 |
| Rivista: | |
| Handle: | http://hdl.handle.net/20.500.11769/10279 |
| Appare nelle tipologie: | 1.1 Articolo in rivista |
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http://hdl.handle.net/20.500.11769/10279
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