The paper introduces a bulk-driven operational transconductance amplifier (OTA) suitable for ultra-low-power and ultra-low-voltage applications. The amplifier is made up of three gain stages and features inherent class-AB behavior and precise control of the quiescent current of all transistors. Additionally, positive feedback is exploited for the first stage to enhance its transconductance. The OTA entails a single Miller capacitor for frequency compensation, thus saving area occupation. Implemented in a 65 nm standard CMOS technology, the amplifier occupies an area of 10.6⋅10–3 mm2 and is powered from 0.3 V with a total quiescent current equal to 8.5 mA. Experimental measurements show a gain-bandwidth product equal to 1.65 MHz and a phase margin equal to 70° when driving a 50-pF load.
300-mV Bulk-Driven Three-Stage OTA in 65-nm CMOS
	
	
	
		
		
		
		
		
	
	
	
	
	
	
	
	
		
		
		
		
		
			
			
			
		
		
		
		
			
			
				
				
					
					
					
					
						
							
						
						
					
				
				
				
				
				
				
				
				
				
				
				
			
			
		
			
			
				
				
					
					
					
					
						
							
						
						
					
				
				
				
				
				
				
				
				
				
				
				
			
			
		
			
			
				
				
					
					
					
					
						
							
						
						
					
				
				
				
				
				
				
				
				
				
				
				
			
			
		
			
			
				
				
					
					
					
					
						
							
						
						
					
				
				
				
				
				
				
				
				
				
				
				
			
			
		
		
		
		
	
Ballo A.;Grasso A. D.
						
						
							Primo
;Pennisi S.;Susinni G.
			2023-01-01
Abstract
The paper introduces a bulk-driven operational transconductance amplifier (OTA) suitable for ultra-low-power and ultra-low-voltage applications. The amplifier is made up of three gain stages and features inherent class-AB behavior and precise control of the quiescent current of all transistors. Additionally, positive feedback is exploited for the first stage to enhance its transconductance. The OTA entails a single Miller capacitor for frequency compensation, thus saving area occupation. Implemented in a 65 nm standard CMOS technology, the amplifier occupies an area of 10.6⋅10–3 mm2 and is powered from 0.3 V with a total quiescent current equal to 8.5 mA. Experimental measurements show a gain-bandwidth product equal to 1.65 MHz and a phase margin equal to 70° when driving a 50-pF load.| File | Dimensione | Formato | |
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