Sfoglia per Autore
Parameterised System Design Based on Genetic Algorithms
file da validare2001-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
A Novel Approach to Design Space Exploration of Parameterized SOCs
file da validare2001-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
An Instruction-Level Power Analysis Model with Data Dependency
2001-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Sarta, D.
Design Space Exploration Methodologies for IP-based System-on-a-chip
file da validare2002-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Tuning methodologies for parameterized systems design
file da validare2002-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Multi-objective design space exploration using genetic algorithms
file da validare2002-01-01 Palesi, Maurizio; Givargis, T.
An evolutionary approach for Pareto-optimal configurations in SOC platforms
file da validare2002-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Tuning methodologies for parameterized systems design
file da validare2002-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
A Framework for Design Space Exploration of Parameterized VLSI Systems
file da validare2002-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems
file da validare2003-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
EPIC-Explorer: A parameterized VLIW-based platform framework for design space exploration
file da validare2003-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
An evolutionary approach for reducing the switching activity in address buses
file da validare2003-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Parlato, A.
A genetic approach to bus encoding
file da validare2003-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Parlato, A.
EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration
file da validare2003-01-01 G., Ascia; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
Multi-objective mapping for mesh-based NoC architectures
2004-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Power/Energy Perspective on Hyperblock Formation
file da validare2004-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
A GA Based Design Space Exploration Framework for Parameterized System-on-a-Chip Platforms
2004-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
Multi-Objective Optimization of a Prameterized VLIW Architecture
file da validare2004-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
Mapping Cores on Network-on-Chip
2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems
file da validare2005-01-01 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
Parameterised System Design Based on Genetic Algorithms | 1-gen-2001 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
A Novel Approach to Design Space Exploration of Parameterized SOCs | 1-gen-2001 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
An Instruction-Level Power Analysis Model with Data Dependency | 1-gen-2001 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Sarta, D. | |
Design Space Exploration Methodologies for IP-based System-on-a-chip | 1-gen-2002 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
Tuning methodologies for parameterized systems design | 1-gen-2002 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
Multi-objective design space exploration using genetic algorithms | 1-gen-2002 | Palesi, Maurizio; Givargis, T. | file da validare |
An evolutionary approach for Pareto-optimal configurations in SOC platforms | 1-gen-2002 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
Tuning methodologies for parameterized systems design | 1-gen-2002 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
A Framework for Design Space Exploration of Parameterized VLSI Systems | 1-gen-2002 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems | 1-gen-2003 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | file da validare |
EPIC-Explorer: A parameterized VLIW-based platform framework for design space exploration | 1-gen-2003 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
An evolutionary approach for reducing the switching activity in address buses | 1-gen-2003 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Parlato, A. | file da validare |
A genetic approach to bus encoding | 1-gen-2003 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Parlato, A. | file da validare |
EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration | 1-gen-2003 | G., Ascia; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
Multi-objective mapping for mesh-based NoC architectures | 1-gen-2004 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | |
Power/Energy Perspective on Hyperblock Formation | 1-gen-2004 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
A GA Based Design Space Exploration Framework for Parameterized System-on-a-Chip Platforms | 1-gen-2004 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | |
Multi-Objective Optimization of a Prameterized VLIW Architecture | 1-gen-2004 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
Mapping Cores on Network-on-Chip | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio | |
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems | 1-gen-2005 | Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide | file da validare |
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