We propose a NMOS low drop-out voltage regulator suitable for on-chip power management. The circuit does not requires any external components for achieving compensation since it is internally compensated. A dynamic biasing strategy and a clock booster allows to properly drive the NMOS power transistor in a power efficient fashion and without limiting the speed response of the regulator. Transistor level simulations confirm the effectiveness of the proposed approach.
On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique
GIUSTOLISI, Gianluca;PALUMBO, Gaetano
2009-01-01
Abstract
We propose a NMOS low drop-out voltage regulator suitable for on-chip power management. The circuit does not requires any external components for achieving compensation since it is internally compensated. A dynamic biasing strategy and a clock booster allows to properly drive the NMOS power transistor in a power efficient fashion and without limiting the speed response of the regulator. Transistor level simulations confirm the effectiveness of the proposed approach.File in questo prodotto:
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R024 - On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique.pdf
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