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EnglishThis paper investigates the design of low-voltage low-power switched-capacitor (SC) filters for high-frequency applications by using the clock-booster approach. In particular, our proposed SC filter architecture uses single-ended double-sampling integrator cells based on low-voltage operational transconductance amplifiers which take advantage of dynamic biasing and the clock-booster technique to drive the switch transistors. To validate its high-frequency capability, two low-pass elliptic SC filters respectively with a corner frequency of 6 and 8-MHz, were designed in a 0.35-mum CMOS process. Both are suitable for telecom applications and can operate with a power supply as low as 1.5 V, while dissipating 11 mW. Measurements showed that for an output amplitude of 1 V(pp), their total harmonic distortions were maintained well below -40 dB in their bandwidths. Comparisons with other SC filter implementations in the literature, which highlight the quality of our implementation are also provided.
| Titolo: | Exploiting the High-Frequency Performance of Low-Voltage Low-Power SC Filters | |
| Autori interni: | ||
| Data di pubblicazione: | 2004 | |
| Rivista: | ||
| Handle: | http://hdl.handle.net/20.500.11769/10234 | |
| Appare nelle tipologie: | 1.1 Articolo in rivista |
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http://hdl.handle.net/20.500.11769/10234
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