A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500 Omega resistor it exhibits negligible even harmonic components whilst odd components are maintained well below -20 dB up to 900 mV(pp) of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.
1V CMOS output stage with excellent linearity
GIUSTOLISI, Gianluca;PALUMBO, Gaetano
2002-01-01
Abstract
A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500 Omega resistor it exhibits negligible even harmonic components whilst odd components are maintained well below -20 dB up to 900 mV(pp) of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.File in questo prodotto:
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