Errors limiting the resolution of current-mode algorithmic analog-to-digital converters are mainly related to current mirror operation. While systematic errors can be minimized by proper circuit techniques, random sources are unavoidable. In this paper a statistical analysis of the resolution of a typical converter is carried out taking into account process tolerances. To support the analysis, a 4-bit ADC, realized in a 0.35-mum CMOS technology, was exhaustively simulated. Results were found to be in excellent agreement with theoretical derivations.
Resolution of a Current-Mode Algorithmic Analog-to-Digital Converter
GIUSTOLISI, Gianluca;PALUMBO, Gaetano;PENNISI, Salvatore
2002-01-01
Abstract
Errors limiting the resolution of current-mode algorithmic analog-to-digital converters are mainly related to current mirror operation. While systematic errors can be minimized by proper circuit techniques, random sources are unavoidable. In this paper a statistical analysis of the resolution of a typical converter is carried out taking into account process tolerances. To support the analysis, a 4-bit ADC, realized in a 0.35-mum CMOS technology, was exhaustively simulated. Results were found to be in excellent agreement with theoretical derivations.File in questo prodotto:
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