A low-power current mode bipolar frequency divider is discussed. Low-power consumption is achieved owing to the design strategy being based on a progressive reduction of bias currents through stages without affecting divider operation speed. The strategy is independent of the process used and simple to design. avoiding the trial-and-error approach based on simulations.
|Titolo:||Design of low-power high-speed bipolar frequency dividers|
|Data di pubblicazione:||2002|
|Appare nelle tipologie:||1.1 Articolo in rivista|