A graphene field effect transistor (GFET), where the active area is made of monolayer large-area graphene, is simulated including a full 2D Poisson equation and a drift-diffusion model with mobilities deduced by a direct numerical solution of the semiclassical Boltzmann equations for charge transport by a suitable discontinuous Galerkin approach Romano et al. (2015), Coco et al. (2017), Coco et al. (2019), Majorana et al. (2019), Coco and Nastasi (2020)[1–5]. The results are qualitatively in agreement with experimental data and other simulations known in the literature and based on compact models where some heuristics is present (see for example Jiménez and Moldovan (2011), Upadhyay et al. (2018)[6,7]). The critical issue in a GFET is the difficulty of fixing the off state which requires an accurate calibration of the gate voltages. In the present paper we have further confirmation of this feature which makes GFET not the optimal device for post-silicon nanoscale electron technology.
A full coupled drift-diffusion-Poisson simulation of a GFET
Nastasi G.;Romano V.
2020-01-01
Abstract
A graphene field effect transistor (GFET), where the active area is made of monolayer large-area graphene, is simulated including a full 2D Poisson equation and a drift-diffusion model with mobilities deduced by a direct numerical solution of the semiclassical Boltzmann equations for charge transport by a suitable discontinuous Galerkin approach Romano et al. (2015), Coco et al. (2017), Coco et al. (2019), Majorana et al. (2019), Coco and Nastasi (2020)[1–5]. The results are qualitatively in agreement with experimental data and other simulations known in the literature and based on compact models where some heuristics is present (see for example Jiménez and Moldovan (2011), Upadhyay et al. (2018)[6,7]). The critical issue in a GFET is the difficulty of fixing the off state which requires an accurate calibration of the gate voltages. In the present paper we have further confirmation of this feature which makes GFET not the optimal device for post-silicon nanoscale electron technology.File | Dimensione | Formato | |
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