In this Letter a new compensation strategy for a class of three-stage operational transconductance amplifiers is proposed. The proposed approach reduces the original third-order transfer function of the loop gain to that of a pure two-pole amplifier thus allowing the designer to use well-known and consolidated design rules. The approach, suitable for high-speed switched-capacitor circuits, is vali- dated by means of intensive Monte Carlo simulations on a 65-nm three-stage CMOS amplifier.

Compensation strategy for high-speed three-stage switched-capacitor amplifiers

GIUSTOLISI, Gianluca;PALUMBO, Gaetano
2016-01-01

Abstract

In this Letter a new compensation strategy for a class of three-stage operational transconductance amplifiers is proposed. The proposed approach reduces the original third-order transfer function of the loop gain to that of a pure two-pole amplifier thus allowing the designer to use well-known and consolidated design rules. The approach, suitable for high-speed switched-capacitor circuits, is vali- dated by means of intensive Monte Carlo simulations on a 65-nm three-stage CMOS amplifier.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11769/49827
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