The paper introduces an enhanced digital OTA topology which allows increasing the DC gain thanks to the adoption of an inverter-based output stage. Moreover, a new equivalent small-signal model is proposed which allows to simplify the circuit analysis and paves the way to new frequency compensation strategies. Designed using a 28-nm standard CMOS technology and working at 0.3-V power supply, post-layout simulations show a 66-dB gain and a 12.3-kHz gain bandwidth product while driving a 250-pF capacitive load. As compared to other ultra-low-voltage OTAs in literature, an increase of small and large signal performance, respect to area occupation, equal to 4.6X and 1.5X, respectively, is obtained.
A novel Digital OTA topology with 66-dB DC Gain and 12.3-kHz Bandwidth
Privitera M.
Primo
;Grasso A.
2023-01-01
Abstract
The paper introduces an enhanced digital OTA topology which allows increasing the DC gain thanks to the adoption of an inverter-based output stage. Moreover, a new equivalent small-signal model is proposed which allows to simplify the circuit analysis and paves the way to new frequency compensation strategies. Designed using a 28-nm standard CMOS technology and working at 0.3-V power supply, post-layout simulations show a 66-dB gain and a 12.3-kHz gain bandwidth product while driving a 250-pF capacitive load. As compared to other ultra-low-voltage OTAs in literature, an increase of small and large signal performance, respect to area occupation, equal to 4.6X and 1.5X, respectively, is obtained.File | Dimensione | Formato | |
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