A high-performance CMOS unity-gain current amplifier is proposed. The solution adopts two feedback loops to reduce the input resistance and a nested-Miller technique to provide frequency compensation. A design example using a 0.8 mu m process and a 2 V supply is given and SPICE simulations show a bandwidth of 75 MHz, no slew-rate limitations and a settling time better than 50 ns, irrespective of the current amplitude. Input and output resistances are better than 0.1 Omega and 15 M Omega, respectively. The input-referred white noise spectral density is 10pA/root Hz. (c) 2006 Elsevier Ltd. All rights reserved.
High-Speed CMOS Unity-Gain Current Amplifier
DI CATALDO, Giuseppe;MITA, ROSARIO;PENNISI, Salvatore
2006-01-01
Abstract
A high-performance CMOS unity-gain current amplifier is proposed. The solution adopts two feedback loops to reduce the input resistance and a nested-Miller technique to provide frequency compensation. A design example using a 0.8 mu m process and a 2 V supply is given and SPICE simulations show a bandwidth of 75 MHz, no slew-rate limitations and a settling time better than 50 ns, irrespective of the current amplitude. Input and output resistances are better than 0.1 Omega and 15 M Omega, respectively. The input-referred white noise spectral density is 10pA/root Hz. (c) 2006 Elsevier Ltd. All rights reserved.File in questo prodotto:
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