This paper presents a three-channel galvanic isolation interface in GaN technology. Driver, diagnostic, and control channels have been implemented in a two-die integrated system to perform an isolation interface for a high-performance power switching system. Chip-to-chip communication has been used, which is based on planar micro-antennas with on–off keying modulated RF carriers. This approach provides a high isolation rating by properly setting the distance between chips. Various innovation aspects are adopted with respect to previously published works. They mainly involve the receiver robustness thanks to the switched-capacitor bias control, a bidirectional data channel implementation for power section diagnostic, and a duty cycle distortion compensation for accurate PWM signal. Driver and control channels use RF carriers of about 2 GHz and 0.9 GHz and achieve 2 MHz and 0.5 MHz measured pulse width modulation signals, respectively. The bidirectional channel adopts an RF carrier of about 400 MHz and exhibits a maximum measured data rate as high as 10 Mb/s. Thanks to the extensive use of switched-capacitor circuit solutions, well-controlled behavior is achieved against the large process tolerances and temperature drifts of the GaN technology. The isolation interface is supplied at 6 V and occupies a die area of 7.6 mm2 for each chip.
Three-Channel Fully Integrated Galvanic Isolation Interface in GaN Technology
Katia Samperi;Nunzio Spina;Giuseppe PALMISANO
2025-01-01
Abstract
This paper presents a three-channel galvanic isolation interface in GaN technology. Driver, diagnostic, and control channels have been implemented in a two-die integrated system to perform an isolation interface for a high-performance power switching system. Chip-to-chip communication has been used, which is based on planar micro-antennas with on–off keying modulated RF carriers. This approach provides a high isolation rating by properly setting the distance between chips. Various innovation aspects are adopted with respect to previously published works. They mainly involve the receiver robustness thanks to the switched-capacitor bias control, a bidirectional data channel implementation for power section diagnostic, and a duty cycle distortion compensation for accurate PWM signal. Driver and control channels use RF carriers of about 2 GHz and 0.9 GHz and achieve 2 MHz and 0.5 MHz measured pulse width modulation signals, respectively. The bidirectional channel adopts an RF carrier of about 400 MHz and exhibits a maximum measured data rate as high as 10 Mb/s. Thanks to the extensive use of switched-capacitor circuit solutions, well-controlled behavior is achieved against the large process tolerances and temperature drifts of the GaN technology. The isolation interface is supplied at 6 V and occupies a die area of 7.6 mm2 for each chip.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.