A 0.15-to-0.9-V V IN Cross-Coupled Charge Pump With Dynamic Leakage Suppression and Frequency Scaling Ring Oscillator Scoring >650-mV Voltage Dynamic Range in 65-nm CMOS

This article first presents a dynamic-leakage-suppression (DLS)-based CMOS cross-coupled charge pump (CCCP) to achieve high-efficiency energy harvesting over the ultra-wide power conversion efficiency (PCE) range. Undesirable leakage currents (ILEAK), stemming from sub-threshold conduction, significantly reduce the overall efficiency of CPs. To surmount this issue, the devised CCCP topology forces transistors into super-cutoff CMOS (SC-CMOS) mode, effectively mitigating ILEAK and improving power efficiency for optimal utilization of harvested energy. Moreover, a dynamic gate-control strategy is implemented to further reduce ILEAK. To enable operation over the ultra-wide PCE range and adapt to varying input voltage (VIN) levels encountered in energy harvesting applications, the proposed CCCP integrates a redundant inverter and frequency scaling in the ring oscillator (RO). This design choice ensures the CCCP’s adaptability and efficiency across a different VIN. The developed three-stage CCCP, fabricated in a 65-nm CMOS, measures a peak PCE of 78% at a VIN of 0.75 V, delivering a 48.37-μA load current at 2.42-V output voltage. Moreover, the prototype exhibits a remarkable 12.67% reduction in ILEAK and achieves the widest voltage dynamic range (VDR) of 650 mV|PCE >40%. These measurement results highlight the superiority of the proposed CCCP compared with the prior CPs, simultaneously showcasing improved PCE, reduced subthreshold ILEAK, and the widest VDR.