A New Control Strategy of a Boost PFC for Enhanced GaN-Based DC-DC Converters

This paper presents an AC-line-synchronized hiccup-mode control strategy for Power Factor Correction (PFC) stages in two-stage AC/DC converters supplying GaN-based Quasi-Resonant Flyback (QRF) converters. The proposed method exploits the regulatory allowance below the IEC 61000-3-2 power threshold to intermittently disable the PFC, while selectively re-enabling it only within the high-efficiency portion of the AC mains cycle. By combining a voltage-hysteresis-based DC-bus management with AC synchronization, the proposed strategy significantly reduces switching losses at light and medium loads while preserving robust transient performance during sudden load steps. Unlike conventional PFC techniques, the PFC is physically powered down at the controller-supply level, avoiding residual losses and cold-start conditions, and ensuring immediate restart without inrush or surge currents. Design criteria for the DC-bus voltage limits are analytically derived to guarantee stable operation of the downstream QRF converter under worst-case load and line conditions, without requiring bulk-capacitor oversizing or increased overcurrent protection limits. The effectiveness of the proposed control strategy is validated through detailed simulations and experimental results on a 100 W GaN-based prototype, demonstrating improved efficiency at light-to-medium loads and superior transient robustness compared with conventional PFC management techniques.