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PATTI, DAVIDE

PATTI, DAVIDE  

INGEGNERIA ELETTRICA ELETTRONICA E INFORMATICA  

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Risultati 1 - 20 di 72 (tempo di esecuzione: 0.051 secondi).
Titolo Data di pubblicazione Autore(i) File
A first effort for a distributed segment-based approach on self-assembled nano networks 1-gen-2013 Catania, Vincenzo; Mineo, A; Monteleone, Salvatore; Patti, Davide
A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks 1-gen-2014 Catania, Vincenzo; Mineo, A; Monteleone, Salvatore; Patti, Davide
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design 1-gen-2006 Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide file da validare
A New Selection Policy for Adaptive Routing in Network on Chip 1-gen-2006 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide file da validare
A Novel approach to Web of Things: M2M and enhanced Javascript technologies 1-gen-2012 Catania, Vincenzo; La Torre, G; Monteleone, Salvatore; Patti, Davide; Vercelli, S; Ricciato, F.
A summary of the special issue "emerging network-on-chip architectures for low power embedded systems" [Editoriale] 1-gen-2017 Patti, Davide
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems 1-gen-2005 Ascia, Giuseppe; Catania, Vincenzo; Palesi, Maurizio; Patti, Davide file da validare
An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded architectures 1-gen-2009 Catania, Vincenzo; DE FRANCISCI MORALES, G; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide file da validare
An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design 1-gen-2006 Giuseppe, Ascia; Vincenzo, Catania; DI NUOVO, A. G.; Palesi, Maurizio; Patti, Davide file da validare
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design 1-gen-2006 Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO A., G; Palesi, Maurizio; Patti, Davide file da validare
An Energy Aware Transmission Control in Wireless Network-on-Chip 1-gen-2015 MOHD SHAHRIZAL, R; OOI CHIA, Y; Marsono, M; Yaghini, P; Bagherzadeh, N; Patti, Davide; Catania, Vincenzo; Palesi, Maurizio
An Hybrid Soft Computing Approach for Automated Computer Design 1-gen-2006 DI NUOVO, A.; Palesi, Maurizio; Patti, Davide file da validare
An open and platfom-independent instruction-set simulator for teaching computer architecture 1-gen-2014 Catania, Vincenzo; Patti, Davide; Palesi, Maurizio; Spadaccini, A; Fazzino, F. file da validare
Analysis and Tools for the Design of VLIW Embedded Systems in a Multi-objective Scenario 1-gen-2007 Catania, Vincenzo; Palesi, Maurizio; Patti, Davide
Analyzing networks-on-chip based deep neural networks 1-gen-2019 Ascia, G.; Catania, V.; Monteleone, S.; Palesi, M.; Patti, D.; Jose, J.
Analyzing the Impact of DNN Hardware Accelerators-Oriented Compression Techniques on General-Purpose Low-End Boards 1-gen-2022 Canzonieri, G.; Monteleone, S.; Palesi, M.; Russo, E.; Patti, D. file da validare
Approximate Wireless Networks-on-Chip 1-gen-2019 Ascia, Giuseppe; Catania, Vincenzo; Monteleone, Salvatore; Palesi, Maurizio; Patti, Davide; Jose, John
Combined Application of Approximate Computing Techniques in DNN Hardware Accelerators 1-gen-2022 Russo, Enrico; Palesi, Maurizio; Patti, Davide; Lahdhiri, Habiba; Monteleone, Salvatore; Ascia, Giuseppe; Catania, Vincenzo
Computational Intelligence to Speed-Up Multi-Objective Design Space Exploration of Embedded Systems 1-gen-2008 Ascia, Giuseppe; Catania, Vincenzo; DI NUOVO, A.; Palesi, Maurizio; Patti, Davide file da validare
Coupling routing algorithm and data encoding for low power Networks on Chip 1-gen-2015 Palesi, Maurizio; Patti, Davide; Ascia, Giuseppe; Panno, Daniela Giovanna Anna; Catania, Vincenzo