This paper presents the design and experimental characterization of a power transfer system performing a dc-dc conversion with on-chip galvanic isolation. The converter is operated in the VHF band, which enables fully integration of all the required components in silicon technology. It consists of only two silicon dice, i.e., a power oscillator with an on-chip isolation transformer and a full-bridge rectifier, which are fabricated in 0.35-μm BCD and 0.13-μm CMOS technology, respectively. A thick SiO2 layer was used, which guarantees galvanic isolation between the transformer windings. A co-design procedure for the system building blocks is proposed, which aims at optimizing the dc-dc converter performance in terms of power efficiency at a given power density. Thanks to the adopted approach, a maximum output power up to 980 mW is demonstrated with a power efficiency of 29.6%. This paper outperforms previously reported integrated inductive step-up converters in terms of power per silicon area (up to 105 mW/mm2), while providing on-chip galvanic isolation without any discrete devices or post-processing steps.

A fully integrated watt-level power transfer system with on-chip galvanic isolation in silicon technology

Ragonese E;PALMISANO, Giuseppe
2017-01-01

Abstract

This paper presents the design and experimental characterization of a power transfer system performing a dc-dc conversion with on-chip galvanic isolation. The converter is operated in the VHF band, which enables fully integration of all the required components in silicon technology. It consists of only two silicon dice, i.e., a power oscillator with an on-chip isolation transformer and a full-bridge rectifier, which are fabricated in 0.35-μm BCD and 0.13-μm CMOS technology, respectively. A thick SiO2 layer was used, which guarantees galvanic isolation between the transformer windings. A co-design procedure for the system building blocks is proposed, which aims at optimizing the dc-dc converter performance in terms of power efficiency at a given power density. Thanks to the adopted approach, a maximum output power up to 980 mW is demonstrated with a power efficiency of 29.6%. This paper outperforms previously reported integrated inductive step-up converters in terms of power per silicon area (up to 105 mW/mm2), while providing on-chip galvanic isolation without any discrete devices or post-processing steps.
2017
BIMOS integrated circuits;CMOS integrated circuits;DC-DC power convertors;elemental semiconductors;oscillators;rectifiers;silicon;silicon compounds;transformer windings;integrated watt-level power transfer system;on-chip galvanic isolation;silicon technology;dc-dc conversion;VHF band;silicon dice;power oscillator;on-chip isolation transformer;full-bridge rectifier;BCD technology;CMOS technology;transformer windings;system building blocks;integrated inductive step-up converters;size 0.35 mum;size 0.13 mum;efficiency 29.6 percent;SiO2;Si;Rectifiers;Oscillators;Silicon;DC-DC power converters;System-on-chip;Capacitance;Logic gates;Full-bridge rectifier;galvanic isolation;integrated transformer;LDMOS;lumped scalable modeling;power oscillator;Schottky diodes;silicon technology
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.11769/79900
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