Structural mechanics and mechanical reliability issues are becoming more and more challenging in the semiconductor industry due to the continuous trend of the device dimensional shrinkage and simultaneous increased operative temperature and power density. As main consequence of the downsizing and more aggressive operative conditions, the mechanical robustness assessment is now having a central role in the device engineering and assessment phase. The risk of mechanical crack in the brittle oxide layers, which are embedded in pad stacks, increases during the device manufacturing processes such as the electrical wafer testing and during wire bonding. This risk increases with the presence of intrinsic mechanical stress in individual layers resulting from the metal grain growth mechanisms, the stack layers’ interfacial mismatches in coefficients of thermal expansion and the temperature stress induced by doping diffusion and film deposition. The current trend of innovation in the electronic industry is going over the semiconductor material itself and it is now impacting the improvement of the Back-End of Line. Key actors are becoming the interactions between the semiconductor die and the device packaging such as adhesion layers, barriers and metal stacks. In the present work, different pad structures have been structurally analyzed and benchmarked. The experimental characterization of the pad structures has been done through a flat punch nano-indentation to investigate on the mechanical strength and the crack propagation. The considered mechanical load reproduces the vertical impact force applied during wire bonding process to create the bond-pad electrical interconnection. The obtained testing results have been compared to finite element models to analyze the stress distribution through the different layers’ stacks. Scope of this work is to demonstrate the validity of the proposed integrated numerical/experimental methodology, showing the impact of the metal connections layouts by the analysis of the stress notch factors and crack propagation behaviour.
|Titolo:||Structural characterization of semiconductor multi-layer pad|
SEQUENZIA, GAETANO (Corresponding)
|Data di pubblicazione:||2021|
|Appare nelle tipologie:||1.1 Articolo in rivista|