Dynamic Gate Stress: Impact of duty cycle and gate resistance on automotive grade planar-gate 1200 V SiC MOSFET

Over the past few years, Silicon Carbide (SiC) power MOSFETs had a huge success both in terms of performances and impact on market. However, threshold voltage (Vth) instability is still a key aspect to attention, especially in long-term switching behavior. In this work, we have implemented Dynamic Gate Stress (DGS) reliability test on an automotive grade, planar-gate, SiC MOSFET. We have assessed the impact of duty cycles values, namely 25 % and 50 %, combined with different Rg values, namely 0 Ω and 6.8 Ω. As a result, a limited impact of duty cycle has been noticed on Vth and on-state resistance (RDS,ON) drifts, independently from the gate resistance value adopted. Besides, for each combination of parameters analyzed, gate–source voltage (VGS) waveforms have been acquired before and after the stress, and, consequently, a statistical analysis have been implemented. No significant variations in peak values and slew rates have been noticed.