IRIS
ASCIA, Giuseppe
 Distribuzione geografica
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Continente #
NA - Nord America 4.984
AS - Asia 2.422
EU - Europa 2.416
AF - Africa 605
SA - Sud America 404
OC - Oceania 11
Continente sconosciuto - Info sul continente non disponibili 1
Totale 10.843
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Nazione #
US - Stati Uniti d'America 4.797
SG - Singapore 1.177
RU - Federazione Russa 766
CN - Cina 728
CI - Costa d'Avorio 415
IT - Italia 381
IE - Irlanda 345
BR - Brasile 340
UA - Ucraina 335
VN - Vietnam 157
CA - Canada 156
DE - Germania 146
FR - Francia 130
SN - Senegal 100
KR - Corea 94
GB - Regno Unito 69
IN - India 69
FI - Finlandia 60
NL - Olanda 39
SE - Svezia 38
NG - Nigeria 36
BD - Bangladesh 35
AR - Argentina 30
TR - Turchia 29
PL - Polonia 26
MX - Messico 20
IQ - Iraq 17
CZ - Repubblica Ceca 16
JP - Giappone 16
PK - Pakistan 14
ES - Italia 13
UZ - Uzbekistan 13
HK - Hong Kong 12
ZA - Sudafrica 12
AT - Austria 11
AU - Australia 11
CH - Svizzera 9
JO - Giordania 8
LB - Libano 8
MA - Marocco 8
CO - Colombia 7
EG - Egitto 7
SA - Arabia Saudita 7
BG - Bulgaria 6
EC - Ecuador 6
ID - Indonesia 6
PY - Paraguay 6
TN - Tunisia 6
VE - Venezuela 6
CL - Cile 5
DZ - Algeria 5
LT - Lituania 5
BJ - Benin 4
GR - Grecia 4
KZ - Kazakistan 4
MY - Malesia 4
PH - Filippine 4
KE - Kenya 3
KG - Kirghizistan 3
OM - Oman 3
PS - Palestinian Territory 3
AO - Angola 2
AZ - Azerbaigian 2
BY - Bielorussia 2
DO - Repubblica Dominicana 2
ET - Etiopia 2
GA - Gabon 2
HN - Honduras 2
IR - Iran 2
JM - Giamaica 2
LU - Lussemburgo 2
PE - Perù 2
QA - Qatar 2
SK - Slovacchia (Repubblica Slovacca) 2
AL - Albania 1
BB - Barbados 1
BE - Belgio 1
BF - Burkina Faso 1
BW - Botswana 1
CR - Costa Rica 1
DK - Danimarca 1
DM - Dominica 1
EE - Estonia 1
EU - Europa 1
GY - Guiana 1
HR - Croazia 1
IL - Israele 1
IM - Isola di Man 1
IS - Islanda 1
KW - Kuwait 1
LV - Lettonia 1
MK - Macedonia 1
ML - Mali 1
MN - Mongolia 1
NI - Nicaragua 1
PT - Portogallo 1
RS - Serbia 1
SV - El Salvador 1
SY - Repubblica araba siriana 1
TH - Thailandia 1
Totale 10.842
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Città #
Dallas 828
Santa Clara 674
Singapore 664
Abidjan 415
San Jose 402
Chandler 400
Dublin 345
Jacksonville 341
Moscow 308
Ashburn 282
Boardman 142
Hefei 136
Catania 124
Grafing 103
Toronto 103
Dakar 100
Lawrence 99
Cambridge 96
Lauterbourg 94
Seoul 94
Andover 93
Nanjing 88
Beijing 85
Chicago 85
Los Angeles 79
San Mateo 65
Des Moines 55
Ho Chi Minh City 53
Houston 47
Council Bluffs 46
Helsinki 45
Hanoi 43
Nanchang 43
New York 42
Buffalo 39
Wilmington 36
Shenyang 35
Hebei 33
Amsterdam 32
São Paulo 31
Civitanova Marche 30
Saint Petersburg 30
Lagos 25
Orem 25
Rome 24
Bengaluru 23
Ottawa 23
Changsha 22
The Dalles 22
Tianjin 21
Brooklyn 20
Columbus 19
San Francisco 19
Augusta 18
Montreal 18
Atlanta 17
Jiaxing 17
Warsaw 16
Phoenix 15
Rio de Janeiro 15
Tokyo 15
London 14
Denver 13
Nuremberg 13
Ankara 12
Da Nang 12
Seattle 12
Boston 11
Chennai 11
Belo Horizonte 10
Brno 10
Norwalk 10
Stockholm 10
Tremestieri Etneo 10
Washington 10
Hong Kong 9
Palermo 9
Poplar 9
Pune 9
Amman 8
Baghdad 8
Brasília 8
Charlotte 8
Edinburgh 8
Jinan 8
Abuja 7
Frankfurt am Main 7
Lahore 7
Porto Alegre 7
Reggio Calabria 7
Haiphong 6
Johannesburg 6
Milan 6
Redondo Beach 6
Turin 6
Caltagirone 5
Canberra 5
Espoo 5
Manchester 5
Mexico City 5
Totale 7.591
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Nome #
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip 153
Approximate Wireless Networks-on-Chip 153
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures 149
A GA Based Design Space Exploration Framework for Parameterized System-on-a-Chip Platforms 146
Analyzing networks-on-chip based deep neural networks 142
A genetic approach to bus encoding 140
A New Selection Policy for Adaptive Routing in Network on Chip 140
A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems 139
A closed loop power manager for transmission power control in wireless network-on-chip architectures 138
A closed loop control based power manager for WiNoC architectures 136
A Fuzzy Buffer management scheme for shared-memory ATM switches 135
A Fuzzy Buffer Management Scheme for ATM and IP Networks 135
Exploiting data resilience in wireless network-on-chip architectures 135
Data Encoding Schemes in Networks on Chip 132
A Framework for Design Space Exploration of Parameterized VLSI Systems 132
Coupling routing algorithm and data encoding for low power Networks on Chip 131
A Framework for a Parallel Architecture Dedicated to Soft Computing 131
A Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems 130
A HIGH LEVEL HARDWARE MODEL FOR A PARALLEL FUZZY PROCESSOR 130
Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures 130
Mapping Cores on Network-on-Chip 126
A dedicated parallel processor for fuzzy computation 126
An Instruction-Level Power Analysis Model with Data Dependency 125
Exploiting antenna directivity in wireless NoC architectures 124
A general purpose processor oriented to fuzzy reasoning 124
Making android apps data-leak-safe by data flow analysis and code injection 124
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design 123
A Novel Approach to Design Space Exploration of Parameterized SOCs 123
Switching Activity Reduction in Embedded Systems: A Genetic Bus Encoding Approach 122
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design 122
A fuzzy system index to preserve interpretability in deep tuning of fuzzy rule based classifiers 121
A High Performance Processor for Application Based on Fuzzy Logic 118
Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices 118
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems 114
A Data Dependent Approach to Instruction Level Power Estimation 114
Multiobjective End-to-End Design Space Exploration of Parameterized DNN Accelerators 112
DNN Model Compression for IoT Domain Specific Hardware Accelerators 112
MEDEA: A Multi-objective Evolutionary Approach to DNN Hardware Mapping 111
An Efficient Fuzzy System for Traffic Management in High Speed Packet Switched Networks 111
A Parallel Architecture for Soft Computing 110
A Very High Speed Parallel Architecture for Fuzzy Applications 108
Fuzzy Decision Making in Embedded System Design 105
Combined Application of Approximate Computing Techniques in DNN Hardware Accelerators 104
Computational Intelligence to Speed-Up Multi-Objective Design Space Exploration of Embedded Systems 103
A Soft Computing Technique for Performance Enhancement in High Speed Shared-Memory Switches 103
Improving Inference Latency and Energy of DNNs through Wireless Enabled Multi-Chip-Module-based Architectures and Model Parameters Compression 103
LAMBDA: An Open Framework for Deep Neural Network Accelerators Simulation 102
Improving energy consumption of NoC based architectures through approximate communication 102
DNN Hardware Accelerator Selection for Feasible Deployment of MARL-Based MAC Protocols in Industrial IoT Networks 100
VLSI hardware architecture for complex fuzzy systems 100
A Parallel Processor Architecture for Real-Time Fuzzy Applications 100
On-Chip Communication Energy Reduction through Reliability Aware Adaptive Voltage Swing Scaling 99
Efficient Design Space Exploration for Application Specific Systems-on-a-Chip 97
Design and Performance Evaluation of a VLSI Parallel Fuzzy Processor 96
An evolutionary management scheme in high performance packet switches, 95
A VLSI fuzzy expert system for real-time traffic control in ATM networks 95
A VLSI PARALLEL ARCHITECTURE FOR FUZZY EXPERT-SYSTEMS 94
Rule-driven VLSI fuzzy processor 94
Runtime Online Links Voltage Scaling for Low Energy Networks on Chip 93
A study on evolutionary multi-objective optimization with fuzzy approximation for computational expensive problems 92
Implementation and Analysis of a New Selection Strategy for Adaptive Routing in Networks-on-Chip 92
A reconfigurable parallel architecture for a fuzzy processor 92
Fuzzy Simulation to Speedup Computer Design 92
Memory-Aware DNN Algorithm-Hardware Mapping via Integer Linear Programming 91
Design of a VLSI Fuzzy Processor for ATM Traffic Sources Management 91
AN EFFICIENT HARDWARE ARCHITECTURE TO SUPPORT COMPLEX FUZZY REASONING 90
Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning 89
Multi-objective mapping for mesh-based NoC architectures 89
Improving inference latency and energy of network-on-chip based convolutional neural networks through weights compression 89
Designing for Parallel Fuzzy Computing 88
Tuning methodologies for parameterized systems design 87
An Adaptive Transmitting Power Technique for Energy Efficient mm-Wave Wireless NoCs 87
An adaptive output selection function based on a fuzzy rule base system for Network on Chip 87
EPIC-Explorer: A parameterized VLIW-based platform framework for design space exploration 85
Improving LSTM-based Indoor Positioning via Simulation-Augmented Geomagnetic Field Dataset 84
Hyperblock Formation: A Power/Energy Perspective for High Performance VLIW Architectures 84
An efficient buffer management scheme based on evolutionary computing 83
An Encoding Scheme to Reduce Power Consumption in Networks-on-Chip 83
An Adaptive Fuzzy Threshold Scheme for High Performance Shared-Memory Switch 82
An efficient buffer management policy based on an integrated Fuzzy-GA approach 82
An integrated Fuzzy-GA Approach for Buffer Management 82
Improving Wormhole Adaptive Routing in Networks on Chip 82
A pipeline parallel architecture for a fuzzy inference processor 81
Design of a priority queue manager for high-speed packet switches 81
Exploring Design Space of VLIW Architectures 80
Power/Energy Perspective on Hyperblock Formation 80
An evolutionary approach for Pareto-optimal configurations in SOC platforms 78
Design of a VLSI Hardware PET Decoder 78
A VLSI Processor dedicated to Fuzzy Systems 77
Neighbors-on-Path: A New Selection Strategy for On-Chip Networks 77
Multi-objective Genetic Approach for System-level Exploration in Parameterized Systems-on-a-chip 77
Design issues of an asynchronous parallel fuzzy processor 76
Exploiting the Approximate Computing Paradigm with DNN Hardware Accelerators 76
Design Space Exploration Methodologies for IP-based System-on-a-chip 74
Performance evaluation of efficient multi-objective evolutionary algorithms for design space exploration of embedded computer systems 74
A reconfigurable parallel architecture for a fuzzy processor 73
NoC Links Energy Reduction through Link Voltage Scaling 72
An efficient hardware architecture to support complex fuzzy reasoning 72
An evolutionary approach for reducing the switching activity in address buses 69
Multi-Objective Optimization of a Prameterized VLIW Architecture 69
Totale 10.397
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Categoria #
all - tutte 34.647
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 34.647
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/202115 0 0 0 0 0 0 0 0 0 0 0 15
2021/2022808 95 103 34 5 99 1 105 21 82 5 22 236
2022/20231.241 114 61 18 86 111 201 3 274 296 21 36 20
2023/2024762 29 212 24 44 23 193 7 19 1 79 84 47
2024/20252.111 41 231 102 67 483 347 79 102 117 201 183 158
2025/20264.659 268 204 932 320 697 907 507 88 244 245 107 140
Totale 11.001