IRIS
PALESI, MAURIZIO
 Distribuzione geografica
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Continente #
NA - Nord America 7.721
AS - Asia 4.224
EU - Europa 3.845
SA - Sud America 792
AF - Africa 686
OC - Oceania 8
Continente sconosciuto - Info sul continente non disponibili 4
AN - Antartide 1
Totale 17.281
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Nazione #
US - Stati Uniti d'America 7.446
SG - Singapore 2.082
RU - Federazione Russa 1.202
CN - Cina 1.172
BR - Brasile 655
IE - Irlanda 627
IT - Italia 568
UA - Ucraina 493
CI - Costa d'Avorio 370
VN - Vietnam 345
FR - Francia 249
CA - Canada 221
DE - Germania 204
KR - Corea 169
FI - Finlandia 150
SN - Senegal 141
GB - Regno Unito 98
IN - India 94
NG - Nigeria 84
AR - Argentina 61
BD - Bangladesh 61
NL - Olanda 52
SE - Svezia 43
TR - Turchia 36
IQ - Iraq 32
HK - Hong Kong 30
MX - Messico 30
PL - Polonia 28
CH - Svizzera 26
UZ - Uzbekistan 25
ES - Italia 24
ZA - Sudafrica 24
CZ - Repubblica Ceca 21
ID - Indonesia 21
JP - Giappone 21
EC - Ecuador 19
PK - Pakistan 19
LB - Libano 16
AT - Austria 15
EG - Egitto 13
MA - Marocco 13
SA - Arabia Saudita 13
VE - Venezuela 13
CL - Cile 12
JO - Giordania 12
PY - Paraguay 11
BJ - Benin 10
GR - Grecia 10
MY - Malesia 9
PH - Filippine 9
AU - Australia 8
CO - Colombia 8
TN - Tunisia 8
IR - Iran 7
KG - Kirghizistan 7
LT - Lituania 7
PE - Perù 7
CY - Cipro 6
DZ - Algeria 6
KE - Kenya 6
JM - Giamaica 5
UY - Uruguay 5
BG - Bulgaria 4
CR - Costa Rica 4
ET - Etiopia 4
IL - Israele 4
OM - Oman 4
PS - Palestinian Territory 4
TT - Trinidad e Tobago 4
AE - Emirati Arabi Uniti 3
DK - Danimarca 3
DO - Repubblica Dominicana 3
EU - Europa 3
KZ - Kazakistan 3
NP - Nepal 3
SY - Repubblica araba siriana 3
TW - Taiwan 3
AL - Albania 2
AO - Angola 2
AZ - Azerbaigian 2
EE - Estonia 2
GE - Georgia 2
HN - Honduras 2
LV - Lettonia 2
MD - Moldavia 2
MK - Macedonia 2
ML - Mali 2
MN - Mongolia 2
NI - Nicaragua 2
PA - Panama 2
RO - Romania 2
SK - Slovacchia (Repubblica Slovacca) 2
AQ - Antartide 1
BE - Belgio 1
BF - Burkina Faso 1
BH - Bahrain 1
BY - Bielorussia 1
GA - Gabon 1
GT - Guatemala 1
GY - Guiana 1
Totale 17.269
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Città #
Dallas 1.561
Singapore 1.157
Santa Clara 1.024
Dublin 625
Chandler 561
Jacksonville 544
Moscow 508
San Jose 502
Abidjan 370
Ashburn 366
Boardman 242
Hefei 238
Catania 193
Lauterbourg 176
Lawrence 173
Cambridge 172
Seoul 168
Nanjing 166
Andover 163
Toronto 149
Chicago 141
Dakar 141
Grafing 128
Helsinki 128
Ho Chi Minh City 125
Beijing 116
Los Angeles 114
Des Moines 108
Hanoi 84
Council Bluffs 79
San Mateo 79
Buffalo 75
Nanchang 65
São Paulo 55
New York 53
Lagos 51
Shenyang 50
Houston 49
Wilmington 46
The Dalles 43
Columbus 40
Saint Petersburg 38
Amsterdam 36
Hebei 36
Jiaxing 35
Changsha 34
Ottawa 34
Orem 32
Tianjin 31
Civitanova Marche 28
Nuremberg 28
Abuja 26
Hong Kong 26
Rome 26
Brooklyn 25
Da Nang 25
Bengaluru 24
Rio de Janeiro 23
Montreal 21
Haiphong 20
London 19
Milan 19
Phoenix 19
Tremestieri Etneo 19
Augusta 18
San Francisco 18
Atlanta 17
Tokyo 17
Warsaw 17
Boston 16
Messina 16
Porto Alegre 16
Ankara 14
Brno 14
Denver 14
Seattle 14
Jinan 13
Poplar 13
Belo Horizonte 12
Chennai 12
Curitiba 12
Johannesburg 12
Munich 12
Norwalk 12
Tashkent 12
Amman 11
Brasília 11
Washington 11
Baghdad 10
Cotonou 10
Frankfurt am Main 10
Liberty Lake 10
Mumbai 10
Palermo 10
Guarulhos 9
Hangzhou 9
Lahore 9
New Delhi 9
Redondo Beach 9
Salvador 9
Totale 11.900
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Nome #
Survey of smartphone-based datasets for indoor localization: A machine learning perspective 360
A Methodology for Simulating Multi-chiplet Systems Using Open-source Simulators 154
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip 151
Approximate Wireless Networks-on-Chip 150
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures 146
An open and platfom-independent instruction-set simulator for teaching computer architecture 145
A GA Based Design Space Exploration Framework for Parameterized System-on-a-Chip Platforms 145
A New Selection Policy for Adaptive Routing in Network on Chip 139
Analyzing networks-on-chip based deep neural networks 139
A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems 138
A closed loop power manager for transmission power control in wireless network-on-chip architectures 137
A genetic approach to bus encoding 137
A closed loop control based power manager for WiNoC architectures 134
A Multi-objective Strategy for Concurrent Mapping and Routing in Networks on Chip 133
Exploiting data resilience in wireless network-on-chip architectures 133
Data Encoding Schemes in Networks on Chip 131
Coupling routing algorithm and data encoding for low power Networks on Chip 130
A Framework for Design Space Exploration of Parameterized VLSI Systems 130
A Deep Reinforcement Learning based Online Scheduling Policy for Deep Neural Network Multi-Tenant Multi-Accelerator Systems 129
Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures 129
The Web as a Platform for Experimental Human-Computer Linguistic Interaction 126
An Instruction-Level Power Analysis Model with Data Dependency 123
Exploiting antenna directivity in wireless NoC architectures 123
Mapping Cores on Network-on-Chip 122
An Efficient Hierarchical Fuzzy Approach for System Level System-on-a-Chip Design 122
Switching Activity Reduction in Embedded Systems: A Genetic Bus Encoding Approach 121
A Multiobjective Genetic Fuzzy Approach for Intelligent System-level Exploration in Parameterized VLIW Processor Design 120
A Novel Approach to Design Space Exploration of Parameterized SOCs 120
A Method for Router Table Compression for Application Specific Routing in Mesh Topology NoC Architectures 119
Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices 117
An Energy Aware Transmission Control in Wireless Network-on-Chip 116
Cycle-accurate network on chip simulation with Noxim 115
An Hybrid Soft Computing Approach for Automated Computer Design 114
A Multi-Level Routing Scheme and Router Architecture to support Hierarchical Routing in Large Network on Chip Platforms 114
A Methodology for Design of Application Specific Deadlock-free Routing Algorithms for NoC Systems 113
Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach 112
A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems 112
Analysis and Tools for the Design of VLIW Embedded Systems in a Multi-objective Scenario 112
m-BMC: Exploration of Magnetic Field Measurements for Indoor Positioning Using mini-Batch Magnetometer Calibration 111
Multiobjective End-to-End Design Space Exploration of Parameterized DNN Accelerators 111
An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded architectures 111
DNN Model Compression for IoT Domain Specific Hardware Accelerators 111
A Characteristics-Based Least Common Multiple Algorithm to Optimize Magnetic-Field-Based Indoor Localization 110
An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design 110
Message from the chairs [NoCArc 2016] 110
Delta multi-stage interconnection networks for scalable wireless on-chip communication 110
MEDEA: A Multi-objective Evolutionary Approach to DNN Hardware Mapping 109
A Novel Timechain-Level Approach to the Modeling of the Bitcoin Lightning Network 109
Combined Application of Approximate Computing Techniques in DNN Hardware Accelerators 104
A Communication-Aware Topological Mapping Technique for NoCs 104
The Repetitive Turn Model for Adaptive Routing 103
Computational Intelligence to Speed-Up Multi-Objective Design Space Exploration of Embedded Systems 102
Improving the energy efficiency of wireless Network on Chip architectures through online selective buffers and receivers shutdown 102
Fuzzy Decision Making in Embedded System Design 102
Improving Energy Efficiency in Wireless Network-on-Chip Architectures 102
LAMBDA: An Open Framework for Deep Neural Network Accelerators Simulation 101
An Offline Method for Designing Adaptive Routing Based on Pressure Model 101
Special issue on energy efficient methods and systems in the emerging cloud era [Editoriale] 101
Improved Flow Control for Minimal Fully Adaptive Routing in 2D Mesh NoC 101
Improving energy consumption of NoC based architectures through approximate communication 101
Improving Inference Latency and Energy of DNNs through Wireless Enabled Multi-Chip-Module-based Architectures and Model Parameters Compression 101
Analyzing the Impact of DNN Hardware Accelerators-Oriented Compression Techniques on General-Purpose Low-End Boards 99
A Data-Driven Approach to Dataflow-Aware Online Scheduling for Graph Neural Network Inference 97
On-Chip Communication Energy Reduction through Reliability Aware Adaptive Voltage Swing Scaling 97
Merging Compilation and Microarchitectural Configuration Spaces for Performance/Power Optimization in VLIW-Based Systems 97
An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures 97
Efficient Design Space Exploration for Application Specific Systems-on-a-Chip 95
Ping-lock round robin arbiter 95
The Suboptimal Routing Algorithm for 2D Mesh Network 95
EXplainable AI for Decision Support to Obesity Comorbidities Diagnosis 94
Explainable AI-Based Clinical Decision Support System for Obesity Comorbidity Analysis 94
Efficient multicast schemes for 3-D Networks-on-Chip 92
Leveraging Partially Faulty Links Usage for Enhancing Yield and Performance in Networks on Chip 91
Networks-on-Chip: Emerging Research Topics and Novel Ideas 90
Runtime Online Links Voltage Scaling for Low Energy Networks on Chip 90
Noxim: An open, extensible and cycle-accurate network on chip simulator 90
Implementation and Analysis of a New Selection Strategy for Adaptive Routing in Networks-on-Chip 90
Fuzzy Simulation to Speedup Computer Design 90
Memory-Aware DNN Algorithm-Hardware Mapping via Integer Linear Programming 89
An efficient technique for in-order packet delivery with adaptive routing algorithms in networks on chip 89
Towards Fair and Firm Real-Time Scheduling in DNN Multi-Tenant Multi-Accelerator Systems via Reinforcement Learning 88
Special issue on emerging on-chip networks and architectures [Editorial] 88
ACDC: An Accuracy- and Congestion-aware Dynamic Traffic Control Method for Networks-on-Chip 88
Improving inference latency and energy of network-on-chip based convolutional neural networks through weights compression 88
Bandwidth Aware Routing Algorithms for Networks-on-Chip Platforms 87
Introduction to the special issue on NoC-based many-core architectures 87
Multi-objective mapping for mesh-based NoC architectures 87
Energy efficient transceiver in wireless Network on Chip architectures 86
Editorial: Special issue on design challenges for many-core processors 85
Tuning methodologies for parameterized systems design 85
An Adaptive Transmitting Power Technique for Energy Efficient mm-Wave Wireless NoCs 85
Abstracting Bitcoin Lightning Network Complexity with Ultraviolet 84
Improving LSTM-based Indoor Positioning via Simulation-Augmented Geomagnetic Field Dataset 84
Emerging Computing Architectures and Systems 84
EPIC-Explorer: A parameterized VLIW-based platform framework for design space exploration 84
Adaptive Packet Relocator in Wireless Network-on-Chip (WiNoC) 84
Introduction to the special section on on-chip and off-chip network architectures 83
An adaptive output selection function based on a fuzzy rule base system for Network on Chip 83
Hyperblock Formation: A Power/Energy Perspective for High Performance VLIW Architectures 82
Genetic Learning of a Fuzzy C-Means Classifier System 82
Totale 11.013
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Categoria #
all - tutte 57.064
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 57.064
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021105 0 0 0 0 0 0 0 0 0 0 77 28
2021/20221.228 144 177 41 6 176 3 178 37 100 5 29 332
2022/20231.916 194 54 34 113 156 338 4 423 492 24 49 35
2023/20241.157 38 253 52 116 34 167 14 40 2 209 147 85
2024/20253.459 68 388 171 93 797 518 104 162 218 383 277 280
2025/20267.615 441 390 1.708 525 1.223 1.368 866 176 366 389 163 0
Totale 17.580