IRIS
PALUMBO, Gaetano
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
NA - Nord America 11.245
EU - Europa 6.088
AS - Asia 4.994
SA - Sud America 902
AF - Africa 629
OC - Oceania 55
Continente sconosciuto - Info sul continente non disponibili 16
AN - Antartide 1
Totale 23.930
Salva come PNG Salva come JPEG
Nazione #
US - Stati Uniti d'America 10.660
SG - Singapore 2.615
CN - Cina 1.721
IE - Irlanda 1.632
UA - Ucraina 1.440
IT - Italia 1.316
BR - Brasile 810
CA - Canada 554
RU - Federazione Russa 392
CI - Costa d'Avorio 375
FI - Finlandia 289
SE - Svezia 223
DE - Germania 206
VN - Vietnam 197
SN - Senegal 188
FR - Francia 163
GB - Regno Unito 126
IN - India 109
CH - Svizzera 70
KR - Corea 64
NL - Olanda 54
AU - Australia 43
AT - Austria 40
UZ - Uzbekistan 39
AR - Argentina 38
PL - Polonia 33
JP - Giappone 29
TW - Taiwan 29
CZ - Repubblica Ceca 28
IQ - Iraq 27
HK - Hong Kong 26
TR - Turchia 26
BD - Bangladesh 22
LB - Libano 20
MX - Messico 17
ZA - Sudafrica 16
EU - Europa 15
NG - Nigeria 15
PK - Pakistan 15
GR - Grecia 14
CO - Colombia 13
EC - Ecuador 12
NZ - Nuova Zelanda 12
PT - Portogallo 9
AE - Emirati Arabi Uniti 8
BG - Bulgaria 8
EG - Egitto 8
ES - Italia 8
KE - Kenya 8
MA - Marocco 8
BE - Belgio 7
JO - Giordania 7
VE - Venezuela 7
IL - Israele 6
RS - Serbia 6
SA - Arabia Saudita 6
BY - Bielorussia 5
CL - Cile 5
DZ - Algeria 5
JM - Giamaica 5
OM - Oman 5
PE - Perù 5
PH - Filippine 5
TN - Tunisia 5
BO - Bolivia 4
BN - Brunei Darussalam 3
IR - Iran 3
KZ - Kazakistan 3
NO - Norvegia 3
PY - Paraguay 3
UY - Uruguay 3
AL - Albania 2
DK - Danimarca 2
GY - Guiana 2
HN - Honduras 2
ID - Indonesia 2
LU - Lussemburgo 2
PS - Palestinian Territory 2
RO - Romania 2
TT - Trinidad e Tobago 2
AZ - Azerbaigian 1
BA - Bosnia-Erzegovina 1
BS - Bahamas 1
DO - Repubblica Dominicana 1
EE - Estonia 1
GA - Gabon 1
GS - Georgia del Sud e Isole Sandwich Australi 1
HR - Croazia 1
HU - Ungheria 1
KG - Kirghizistan 1
LT - Lituania 1
ME - Montenegro 1
MN - Mongolia 1
MT - Malta 1
MY - Malesia 1
NI - Nicaragua 1
NP - Nepal 1
PA - Panama 1
PR - Porto Rico 1
SK - Slovacchia (Repubblica Slovacca) 1
Totale 23.929
Salva come PNG Salva come JPEG
Città #
Santa Clara 2.187
Dublin 1.618
Singapore 1.582
Jacksonville 1.533
Chandler 1.298
Boardman 637
Nanjing 514
Cambridge 447
Lawrence 447
Andover 436
Toronto 412
Civitanova Marche 393
Abidjan 375
Catania 314
Ashburn 293
Helsinki 280
San Mateo 219
Des Moines 214
Wilmington 195
Chicago 191
Dakar 188
Dong Ket 178
Houston 176
Nanchang 145
Shenyang 142
Hebei 123
Saint Petersburg 111
Changsha 103
Jiaxing 97
Hefei 96
Ottawa 92
Tianjin 90
Council Bluffs 73
São Paulo 68
Beijing 64
Grafing 61
Seoul 60
The Dalles 58
Milan 57
Columbus 56
Los Angeles 53
Jinan 38
Moscow 38
Palermo 37
Seattle 32
Rio de Janeiro 31
Belo Horizonte 30
Hangzhou 29
Nuremberg 29
Washington 28
Munich 27
Norwalk 27
Pune 25
Tremestieri Etneo 25
Liberty Lake 24
Piedimonte Etneo 24
Brno 21
New York 21
Zhengzhou 21
Amsterdam 19
Taizhou 19
Brasília 18
Duncan 18
Naples 18
Rome 18
Chennai 17
Kunming 17
Montreal 17
Ningbo 17
Ann Arbor 15
Den Haag 14
New Taipei City 14
Phoenix 14
Acireale 13
Frankfurt Am Main 13
Mumbai 13
Abuja 12
Campinas 12
Ribeirão Preto 12
San Jose 12
Tashkent 12
West Jordan 12
Baghdad 11
Guangzhou 11
Istanbul 11
Shanghai 11
Tokyo 11
London 10
San Francisco 10
Taipei 10
Changchun 9
Hong Kong 9
Lanzhou 9
Marseille 9
Assago 8
Bengaluru 8
Delft 8
Gdansk 8
Guarulhos 8
Hanoi 8
Totale 16.698
Salva come PNG Salva come JPEG
Nome #
A 0.003-mm2 50-mW Three-Stage Amplifier Driving 10-nF with 2.7-MHz GBW 211
Mixed Full Adder topologies for high-performance low-power arithmetic circuits 211
A 1-V CMOS Output Stage with High Linearity 125
Design guidelines of CMOS class-AB output stages: a tutorial 123
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers 121
0.5-v frequency dividers in folded mcml exploiting forward body bias: Analysis and comparison 110
1.2-V CMOS OUTPUT STAGE WITH IMPROVED DRIVE CAPABILITY 104
1.2-V CMOS op-amp with a dynamically biased output stage 104
Robust design of CMOS amplifiers oriented to settling-time specification 101
A Clock Boosted Charge Pump with Reduced Rise Time 101
1.5-V CMOS CCII+ WITH HIGH CURRENT-DRIVING CAPABILITY 100
Advances in Reversed Nested Miller Compensation 98
A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps 95
A 1.35-V Sense Amplifier for Non Volatile Memories based on Current Mode Approach 95
A 1.5 CMOS Voltage Multiplier 95
Design of low-power high-speed bipolar frequency dividers 95
Dynamic-biased capacitor-free NMOS LDO voltage regulator 93
PERFORMANCE EVALUATION OF ADIABATIC GATES 92
Optimized Design of an N-th Order Dickson Voltage Multiplier 92
A New Method for Harmonic Distortion Analysis in Class-AB Stages 92
Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation 91
Signal Amplifiers 90
1.5V power supply CMOS voltage squarer 90
Variations in Nanometer CMOS Flip-Flops: Part I – Timing and Impact of Process Variations 89
A CMOS CURRENT AMPLIFIER 89
A 1.5-V high drive capability CMOS op-amp 88
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes 88
Approach to the design of low-voltage SC filters 87
Design procedures for three-stage CMOS OTAs with nested-Miller compensation 87
1.5-V High-Drive Second Generation Current Conveyor 87
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies 87
A New Advanced RNMC Technique with Dual-Active Current and Voltage Buffers for Low-Power High-Load Three-Stage Amplifiers 86
An Accurate Ultra-Compact I–V Model for Nanometer MOS Transistors With Applications on Digital Circuits 83
Design of an Nth order Dickson voltage multiplier 83
Area-efficient design of three- and four-stage voltage multipliers for power integrated circuits 83
A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications 83
Analysis and optimization of a novel CMOS multiplier 82
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time 81
A Schmitt trigger by means of CCII+ 80
The noise performance of Miller CMOS operational amplifiers with current-buffer frequency compensation 80
195-nW 120-dB Subthreshold CMOS OTA Driving up to 200 pF and Occupying only 4.4·10-3 mm2 80
1V CMOS output stage with excellent linearity 80
Introduzione ai Convertitori A/D del tipo Sigma-Delta 80
Optimized Charge Pump with Clock Booster for Reduced Rise Time or Silicon Area 80
A gm/ID-Based Design Strategy for IoT and Ultra-Low-Power OTAs with Fast-Settling and Large Capacitive Loads 79
IMPROVED BEHAVIORAL AND DESIGN MODEL OF AN N-TH ORDER CHARGE PUMP 78
Pseudo-Random Sequence Generators with Improved Inviolability Performance 78
A New Enhanced PSPICE Implementation of the Equivalent Circuit Model of SiPM Detectors 78
DESIGN METHODOLOGY AND ADVANCES IN NESTED-MILLER COMPENSATION 78
Design and Comparison of Very Low-Voltage CMOS Output Stages 77
An approach to test the open-loop parameters of feedback amplifiers 77
Behavioral modeling of statistical phenomena of single-photon avalanche diodes 76
Improved Power-Efficient RNMC Technique with Voltage Buffer and Nulling Resistors for Low-Power High-Load Three-Stage Amplifiers 76
Introduzione ai Dispositivi Elettronici 76
Memorie Ferroelettriche 75
A compensation strategy for two-stage CMOS opamps based on current buffer 75
2-MHz GBW CMOS OTA for 250 pF to 1.25 nF capacitive load 75
An Approach to the Design of Low-Voltage SC Filters 75
Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW 74
Variations in Nanometer CMOS Flip-Flops: Part II – Energy Variability and Impact of Other Sources of Variations 73
GAIN-COMPENSATED SAMPLE-AND-HOLD CIRCUIT FOR HIGH-FREQUENCY APPLICATION 73
A New Accurate Analytical Expression for the SiPM Transient Response to Single Photons 73
NEW CMOS CURRENT MIRRORS WITH IMPROVED HIGH-FREQUENCY RESPONSE 72
Solutions for CMOS Current Amplifiers with High-Drive Output Stage 72
CML RING OSCILLATORS: OSCILLATION FREQUENCY 72
A Novel Low-Power High-Speed Rail-to-Rail Class-B Buffer Amplifier for LCD Output Drivers 72
Single-miller all-passive compensation network for three-stage OTAs 72
Analytical Comparison of Frequency Compensation Techniques in Three-Stage Amplifiers 71
Design strategies of Cascaded CML Gates 71
AN OPTIMIZED COMPENSATION STRATEGY FOR 2-STAGE CMOS OP AMPS 71
Switched capacitor compatible minimum-maximum function 71
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulator 71
Nonidealities of Tow-Thomas Biquads Using VOA- and CFOA-Based Miller Integrators 70
An Efficient RNM Compensation Topology with Voltage Buffer and Nulling Resistors for Large-Capacitive-Load Three-Stage OTAs 70
Guidelines for Designing Class-AB Output Stages 70
Resolution of a Current-Mode Algorithmic Analog-to-Digital Converter 70
Design of CMOS three-stage amplifiers for near-to-minimum settling-time 70
Propagation Delay of an RC-Circuit with a Ramp Input: an Analytical Very Accurate and Simple Model 69
A high-performance very low-voltage current sense amplifier for nonvolatile memories 69
Power Supply Rejection of Widlar Bandgap Voltage Reference 69
CMOS CURRENT AMPLIFIERS 69
Design procedure for two-stage CMOS transconductance operational amplifiers: A tutorial 69
BEHAVIORAL MODEL OF ANALOG CIRCUITS FOR NONVOLATILE MEMORIES WITH VHDL-AMS 68
Resistance of Feedback Amplifiers: A Novel Representation 68
Distortion analysis of Miller-compensated three-stage amplifiers 68
OFFSET COMPENSATION TECHNIQUE FOR CMOS CURRENT COMPARATORS 68
A Fast Active Quenching and Recharging Circuit for Single-Photon Avalanche diodes 68
A High-Speed Low-Power Output Buffer Amplifier for Large-Size LCD Applications 68
HIGH LINEARITY CMOS CURRENT OUTPUT STAGE 67
PROPAGATION DELAY MODEL OF A CURRENT DRIVEN RC CHAIN FOR AN OPTIMIZED DESIGN 67
DOUBLE AND TRIPLE CHARGE PUMPS WITH MOS DIODES - DYNAMIC-MODELS TO AN OPTIMIZED DESIGN 67
AN ACCURATE OFFSET–COMPENSATED CURRENT COMPARATOR 67
HIGHLY ACCURATE AND SIMPLE MODELS FOR CML AND ECL GATES 66
Modelling and Design Considerations on CML Gates Under High-Current Effects 66
High-performance and simple CMOS unity-gain amplifier 66
Optimized Active Single-Miller Capacitor Compensation with Inner Feedforward for Very High-Load Three-Stage OTAs 66
Charge Pump Circuits: Power Consumption Optimization – A Summary 66
Evaluation of Energy Consumption in RC Ladder Circuits Driven by a Ramp Input 66
Analysis and comparison of class AB current mirror OTAs 66
MODELING OF SOURCE COUPLED LOGIC GATES 65
Totale 8.271
Salva come PNG Salva come JPEG
Categoria #
all - tutte 96.925
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 96.925
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20212.439 13 240 318 10 748 42 257 21 288 14 231 257
2021/20223.166 425 451 9 40 538 5 450 103 312 32 105 696
2022/20234.582 473 164 62 309 392 845 28 880 1.205 28 128 68
2023/20242.496 106 440 100 106 58 281 51 95 15 542 417 285
2024/20257.708 240 851 505 524 1.817 813 209 316 505 872 446 610
2025/2026385 385 0 0 0 0 0 0 0 0 0 0 0
Totale 24.843