IRIS
PALUMBO, Gaetano
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
NA - Nord America 7.384
EU - Europa 5.269
AS - Asia 1.833
AF - Africa 580
OC - Oceania 55
Continente sconosciuto - Info sul continente non disponibili 15
SA - Sud America 13
AN - Antartide 1
Totale 15.150
Salva come PNG Salva come JPEG
Nazione #
US - Stati Uniti d'America 6.840
IE - Irlanda 1.630
CN - Cina 1.449
UA - Ucraina 1.433
IT - Italia 704
CA - Canada 538
RU - Federazione Russa 378
CI - Costa d'Avorio 371
FI - Finlandia 271
SE - Svezia 218
SN - Senegal 187
VN - Vietnam 180
DE - Germania 169
FR - Francia 161
GB - Regno Unito 91
CH - Svizzera 70
IN - India 61
AU - Australia 43
AT - Austria 36
NL - Olanda 28
PL - Polonia 27
UZ - Uzbekistan 26
JP - Giappone 22
SG - Singapore 20
LB - Libano 18
EU - Europa 15
HK - Hong Kong 15
GR - Grecia 13
NG - Nigeria 12
NZ - Nuova Zelanda 12
TW - Taiwan 11
BG - Bulgaria 7
CZ - Repubblica Ceca 7
EG - Egitto 7
AR - Argentina 6
MX - Messico 6
TR - Turchia 6
BE - Belgio 5
PK - Pakistan 5
BR - Brasile 4
PH - Filippine 4
PT - Portogallo 4
BY - Bielorussia 3
IL - Israele 3
IR - Iran 3
KR - Corea 3
DK - Danimarca 2
DZ - Algeria 2
ID - Indonesia 2
LU - Lussemburgo 2
PE - Perù 2
RO - Romania 2
RS - Serbia 2
AE - Emirati Arabi Uniti 1
BD - Bangladesh 1
BN - Brunei Darussalam 1
CL - Cile 1
ES - Italia 1
GS - Georgia del Sud e Isole Sandwich Australi 1
HR - Croazia 1
HU - Ungheria 1
MA - Marocco 1
ME - Montenegro 1
MN - Mongolia 1
MT - Malta 1
MY - Malesia 1
NO - Norvegia 1
Totale 15.150
Salva come PNG Salva come JPEG
Città #
Dublin 1.616
Jacksonville 1.530
Chandler 1.298
Nanjing 514
Cambridge 447
Lawrence 447
Andover 436
Toronto 411
Abidjan 371
Catania 291
Ashburn 277
Helsinki 266
San Mateo 219
Des Moines 213
Wilmington 195
Dakar 187
Dong Ket 178
Houston 172
Boardman 154
Nanchang 145
Shenyang 142
Hebei 123
Saint Petersburg 111
Changsha 103
Jiaxing 97
Ottawa 91
Tianjin 90
Grafing 61
Jinan 38
Palermo 37
Milan 36
Moscow 36
Seattle 29
Hangzhou 28
Nuremberg 28
Norwalk 27
Washington 26
Pune 25
Liberty Lake 24
Piedimonte Etneo 24
Zhengzhou 20
Taizhou 19
Duncan 18
Kunming 17
Ningbo 17
Ann Arbor 15
Beijing 15
Den Haag 14
Montreal 14
Frankfurt Am Main 13
Abuja 12
Los Angeles 12
West Jordan 12
Acireale 10
Lanzhou 9
Marseille 9
Assago 8
Bengaluru 8
Changchun 8
Gdansk 8
Guangzhou 8
Nakamaru 8
Rome 8
Shanghai 8
Taipei 8
Auckland 7
Chennai 7
Brisbane 6
Edinburgh 6
Falls Church 6
Gravina di Catania 6
Istanbul 6
Singapore 6
Turin 6
Brussels 5
Delft 5
Fuzhou 5
Geneva 5
Hanover 5
Lausanne 5
Messina 5
Miro Khan 5
Mountain View 5
Padova 5
San Giuliano Milanese 5
Siracusa 5
Thrissur 5
Amsterdam 4
Arona 4
Bad Kreuznach 4
Bangalore 4
Central 4
Fairfield 4
Lisbon 4
London 4
Ludwigshafen 4
Plano 4
Princeton 4
Redwood City 4
Syracuse 4
Totale 11.014
Salva come PNG Salva come JPEG
Nome #
Mixed Full Adder topologies for high-performance low-power arithmetic circuits 186
A 0.003-mm2 50-mW Three-Stage Amplifier Driving 10-nF with 2.7-MHz GBW 135
A 1-V CMOS Output Stage with High Linearity 95
1.2-V CMOS OUTPUT STAGE WITH IMPROVED DRIVE CAPABILITY 79
PERFORMANCE EVALUATION OF ADIABATIC GATES 73
Robust design of CMOS amplifiers oriented to settling-time specification 73
1.2-V CMOS op-amp with a dynamically biased output stage 73
1.5-V CMOS CCII+ WITH HIGH CURRENT-DRIVING CAPABILITY 70
Optimized Design of an N-th Order Dickson Voltage Multiplier 69
A 1.5 CMOS Voltage Multiplier 67
A 1.35-V Sense Amplifier for Non Volatile Memories based on Current Mode Approach 66
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes 63
1.5V power supply CMOS voltage squarer 63
Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation 63
A CMOS CURRENT AMPLIFIER 62
A New Advanced RNMC Technique with Dual-Active Current and Voltage Buffers for Low-Power High-Load Three-Stage Amplifiers 61
A Clock Boosted Charge Pump with Reduced Rise Time 61
IMPROVED BEHAVIORAL AND DESIGN MODEL OF AN N-TH ORDER CHARGE PUMP 60
Design guidelines of CMOS class-AB output stages: a tutorial 60
A New Method for Harmonic Distortion Analysis in Class-AB Stages 59
Pseudo-Random Sequence Generators with Improved Inviolability Performance 59
Dynamic-biased capacitor-free NMOS LDO voltage regulator 59
Approach to the design of low-voltage SC filters 59
Memorie Ferroelettriche 58
Analysis and optimization of a novel CMOS multiplier 58
Area-efficient design of three- and four-stage voltage multipliers for power integrated circuits 58
A New Enhanced PSPICE Implementation of the Equivalent Circuit Model of SiPM Detectors 58
An Accurate Ultra-Compact I–V Model for Nanometer MOS Transistors With Applications on Digital Circuits 57
Design of an Nth order Dickson voltage multiplier 57
Signal Amplifiers 57
A Schmitt trigger by means of CCII+ 55
A 1.5-V high drive capability CMOS op-amp 55
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies 55
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers 54
The noise performance of Miller CMOS operational amplifiers with current-buffer frequency compensation 54
1.5-V High-Drive Second Generation Current Conveyor 53
A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps 52
Solutions for CMOS Current Amplifiers with High-Drive Output Stage 52
A compensation strategy for two-stage CMOS opamps based on current buffer 52
DESIGN METHODOLOGY AND ADVANCES IN NESTED-MILLER COMPENSATION 52
An approach to test the open-loop parameters of feedback amplifiers 52
HIGHLY ACCURATE AND SIMPLE MODELS FOR CML AND ECL GATES 51
Analytical Comparison of Frequency Compensation Techniques in Three-Stage Amplifiers 51
Propagation Delay of an RC-Circuit with a Ramp Input: an Analytical Very Accurate and Simple Model 51
Design strategies of Cascaded CML Gates 51
AN OPTIMIZED COMPENSATION STRATEGY FOR 2-STAGE CMOS OP AMPS 51
Improved Power-Efficient RNMC Technique with Voltage Buffer and Nulling Resistors for Low-Power High-Load Three-Stage Amplifiers 51
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time 51
A Novel Low-Power High-Speed Rail-to-Rail Class-B Buffer Amplifier for LCD Output Drivers 51
A New Accurate Analytical Expression for the SiPM Transient Response to Single Photons 51
Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW 51
Behavioral modeling of statistical phenomena of single-photon avalanche diodes 50
CMOS CURRENT AMPLIFIERS 50
Introduzione ai Dispositivi Elettronici 50
Introduzione ai Convertitori A/D del tipo Sigma-Delta 50
Optimized Charge Pump with Clock Booster for Reduced Rise Time or Silicon Area 50
BEHAVIORAL MODEL OF ANALOG CIRCUITS FOR NONVOLATILE MEMORIES WITH VHDL-AMS 49
Modelling and Design Considerations on CML Gates Under High-Current Effects 49
PROPAGATION DELAY MODEL OF A CURRENT DRIVEN RC CHAIN FOR AN OPTIMIZED DESIGN 49
Evaluation of Energy Consumption in RC Ladder Circuits Driven by a Ramp Input 49
Switched capacitor compatible minimum-maximum function 49
Single-miller all-passive compensation network for three-stage OTAs 49
0.5-v frequency dividers in folded mcml exploiting forward body bias: Analysis and comparison 49
Flip-Flop Energy/Performance versus Clock Slope and Impact on the Clock Network Design 48
Optimized Active Single-Miller Capacitor Compensation with Inner Feedforward for Very High-Load Three-Stage OTAs 48
GAIN-COMPENSATED SAMPLE-AND-HOLD CIRCUIT FOR HIGH-FREQUENCY APPLICATION 48
An Efficient RNM Compensation Topology with Voltage Buffer and Nulling Resistors for Large-Capacitive-Load Three-Stage OTAs 48
An Approach to the Design of Low-Voltage SC Filters 48
195-nW 120-dB Subthreshold CMOS OTA Driving up to 200 pF and Occupying only 4.4·10-3 mm2 48
1V CMOS output stage with excellent linearity 48
HIGH LINEARITY CMOS CURRENT OUTPUT STAGE 47
OFFSET COMPENSATION TECHNIQUE FOR CMOS CURRENT COMPARATORS 47
Charge Pump Circuits: Power Consumption Optimization – A Summary 47
Analysis and comparison of class AB current mirror OTAs 47
Variations in Nanometer CMOS Flip-Flops: Part II – Energy Variability and Impact of Other Sources of Variations 47
Design and Comparison of Very Low-Voltage CMOS Output Stages 47
Design of High-Speed Power-Efficient MOS Current-Mode Logic Frequency Dividers 47
A Fast Active Quenching and Recharging Circuit for Single-Photon Avalanche diodes 47
Design procedure for two-stage CMOS transconductance operational amplifiers: A tutorial 47
A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications 47
Improved Low-Power High-Speed Buffer Amplifier with Slew-Rate Enhancement for LCD Applications 46
A high-performance very low-voltage current sense amplifier for nonvolatile memories 46
2-MHz GBW CMOS OTA for 250 pF to 1.25 nF capacitive load 46
MODELING OF SOURCE COUPLED LOGIC GATES 45
Power-Aware Design Techniques for Nanometer MOS Current-Mode Logic Gates: a Design Framework 45
High-performance and simple CMOS unity-gain amplifier 45
A SIMPLE STRATEGY FOR OPTIMIZED DESIGN OF ONE-LEVEL CARRY-SKIP ADDERS 45
Charge Pump with Adaptive Stages for Non-Volatile Memories 45
Guidelines for Designing Class-AB Output Stages 45
AN APPROACH TO MODEL HIGH-FREQUENCY DISTORTION IN NEGATIVE-FEEDBACK AMPLIFIERS 45
NAND/NOR ADIABATIC GATES: POWER CONSUMPTION EVALUATION AND COMPARISON VERSUS THE FAN-IN 44
NEW CMOS CURRENT MIRRORS WITH IMPROVED HIGH-FREQUENCY RESPONSE 44
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulator 44
A High-Speed Low-Power Output Buffer Amplifier for Large-Size LCD Applications 44
Reversed Nested Miller Compensation with Voltage Follower 44
Noise in High-Frequency Circuits and Oscillators (by Burkhard Schiek, Ilona Rolfes, Heins-Jurgen Siweris), in IEEE Circuits & Devices Magazine 44
Nonidealities of Tow-Thomas Biquads Using VOA- and CFOA-Based Miller Integrators 43
Understanding the Effect of Process Variations on the Delay of Static and Domino Logic 43
MICROPROCESSOR DESIGN USING HARDWARE DESCRIPTION LANGUAGE 43
Simple and Accurate Modeling of the Output Transition Time in Nanometer CMOS Gates 43
Totale 5.502
Salva come PNG Salva come JPEG
Categoria #
all - tutte 51.938
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 51.938
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/201973 0 0 0 0 0 0 0 0 0 12 1 60
2019/20202.520 1.002 183 168 70 213 11 201 6 269 8 293 96
2020/20212.439 13 240 318 10 748 42 257 21 288 14 231 257
2021/20223.166 425 451 9 40 538 5 450 103 312 32 105 696
2022/20234.583 473 164 62 309 392 845 28 880 1.206 28 128 68
2023/20241.786 107 440 100 106 58 281 51 95 15 533 0 0
Totale 16.041