IRIS
PALUMBO, Gaetano
 Distribuzione geografica
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Continente #
NA - Nord America 21.572
AS - Asia 8.237
EU - Europa 8.093
SA - Sud America 1.485
AF - Africa 974
OC - Oceania 58
Continente sconosciuto - Info sul continente non disponibili 16
AN - Antartide 2
Totale 40.437
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Nazione #
US - Stati Uniti d'America 20.930
SG - Singapore 4.494
CN - Cina 2.548
RU - Federazione Russa 2.190
IE - Irlanda 1.632
UA - Ucraina 1.448
IT - Italia 1.377
BR - Brasile 1.277
CI - Costa d'Avorio 653
CA - Canada 567
VN - Vietnam 421
FI - Finlandia 292
SE - Svezia 237
DE - Germania 214
SN - Senegal 189
FR - Francia 169
GB - Regno Unito 160
KR - Corea 153
IN - India 136
HK - Hong Kong 90
AR - Argentina 77
CH - Svizzera 72
NL - Olanda 72
BD - Bangladesh 49
PL - Polonia 48
AU - Australia 45
JP - Giappone 45
MX - Messico 45
AT - Austria 43
UZ - Uzbekistan 43
ZA - Sudafrica 39
EC - Ecuador 35
IQ - Iraq 34
TW - Taiwan 33
CZ - Repubblica Ceca 29
TR - Turchia 29
ID - Indonesia 27
EG - Egitto 26
CO - Colombia 25
GR - Grecia 22
LB - Libano 20
PK - Pakistan 20
ES - Italia 18
PE - Perù 17
BJ - Benin 15
EU - Europa 15
NG - Nigeria 15
PY - Paraguay 15
VE - Venezuela 14
AE - Emirati Arabi Uniti 12
CL - Cile 12
NZ - Nuova Zelanda 12
IL - Israele 11
IR - Iran 11
KE - Kenya 11
PH - Filippine 11
BG - Bulgaria 9
MA - Marocco 9
PT - Portogallo 9
SA - Arabia Saudita 9
JO - Giordania 8
BE - Belgio 7
JM - Giamaica 7
TN - Tunisia 7
BY - Bielorussia 6
DK - Danimarca 6
DZ - Algeria 6
LT - Lituania 6
OM - Oman 6
RS - Serbia 6
UY - Uruguay 6
HN - Honduras 5
BO - Bolivia 4
KZ - Kazakistan 4
PA - Panama 4
AL - Albania 3
AZ - Azerbaigian 3
BN - Brunei Darussalam 3
MY - Malesia 3
NO - Norvegia 3
SV - El Salvador 3
CR - Costa Rica 2
DO - Repubblica Dominicana 2
GY - Guiana 2
HR - Croazia 2
HU - Ungheria 2
KG - Kirghizistan 2
LU - Lussemburgo 2
ML - Mali 2
NP - Nepal 2
PS - Palestinian Territory 2
RO - Romania 2
TH - Thailandia 2
TL - Timor Orientale 2
TT - Trinidad e Tobago 2
AQ - Antartide 1
BA - Bosnia-Erzegovina 1
BH - Bahrain 1
BS - Bahamas 1
CU - Cuba 1
Totale 40.419
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Città #
Dallas 9.394
Singapore 2.494
Santa Clara 2.198
Dublin 1.618
Jacksonville 1.534
Chandler 1.298
Moscow 809
Abidjan 653
Boardman 638
Nanjing 515
Ashburn 477
Cambridge 447
Lawrence 447
Andover 436
Hefei 416
Toronto 415
Civitanova Marche 393
Catania 321
Beijing 311
Los Angeles 296
Helsinki 280
San Mateo 219
Des Moines 214
Chicago 202
Wilmington 195
Dakar 189
Houston 180
Dong Ket 178
Seoul 147
Nanchang 145
Shenyang 142
Hebei 123
São Paulo 115
Saint Petersburg 111
Changsha 103
Jiaxing 97
Ho Chi Minh City 94
Ottawa 92
Tianjin 90
Buffalo 87
Council Bluffs 78
Hong Kong 73
Grafing 61
Milan 60
The Dalles 58
Columbus 56
New York 55
Hanoi 48
Rio de Janeiro 47
Palermo 46
San Jose 41
Belo Horizonte 39
Jinan 38
Seattle 38
Redondo Beach 36
Amsterdam 35
Munich 31
Hangzhou 29
Nuremberg 29
Washington 29
Brasília 27
Norwalk 27
Chennai 26
Tokyo 26
Tremestieri Etneo 26
Pune 25
Liberty Lake 24
Piedimonte Etneo 24
Rome 24
Warsaw 23
Brno 22
Brooklyn 22
Montreal 22
Phoenix 22
Zhengzhou 21
Cairo 19
London 19
Taizhou 19
Duncan 18
Naples 18
Boston 17
Curitiba 17
Johannesburg 17
Kunming 17
Ningbo 17
New Taipei City 16
Porto Alegre 16
Stockholm 16
Tashkent 16
Ann Arbor 15
Cotonou 15
Lima 15
Baghdad 14
Bengaluru 14
Campinas 14
Den Haag 14
Haiphong 14
Acireale 13
Atlanta 13
Denver 13
Totale 29.797
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Nome #
A 0.003-mm2 50-mW Three-Stage Amplifier Driving 10-nF with 2.7-MHz GBW 3.656
0.5-v frequency dividers in folded mcml exploiting forward body bias: Analysis and comparison 3.520
Mixed Full Adder topologies for high-performance low-power arithmetic circuits 228
A 1-V CMOS Output Stage with High Linearity 186
A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps 184
1.5-V CMOS CCII+ WITH HIGH CURRENT-DRIVING CAPABILITY 176
1.2-V CMOS op-amp with a dynamically biased output stage 169
Design guidelines of CMOS class-AB output stages: a tutorial 165
A 1.5-V high drive capability CMOS op-amp 161
1.2-V CMOS OUTPUT STAGE WITH IMPROVED DRIVE CAPABILITY 160
1.5V power supply CMOS voltage squarer 159
A Clock Boosted Charge Pump with Reduced Rise Time 159
A 1.5 CMOS Voltage Multiplier 153
1.5-V High-Drive Second Generation Current Conveyor 153
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers 148
A CMOS CURRENT AMPLIFIER 147
A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications 145
195-nW 120-dB Subthreshold CMOS OTA Driving up to 200 pF and Occupying only 4.4·10-3 mm2 141
A 1.35-V Sense Amplifier for Non Volatile Memories based on Current Mode Approach 140
1V CMOS output stage with excellent linearity 138
A Charge Loss Aware Advanced Model of Dickson Voltage Multipliers 133
2-MHz GBW CMOS OTA for 250 pF to 1.25 nF capacitive load 131
Design of low-power high-speed bipolar frequency dividers 131
A New Method for Harmonic Distortion Analysis in Class-AB Stages 125
Design of an Nth order Dickson voltage multiplier 125
A gm/ID-Based Design Strategy for IoT and Ultra-Low-Power OTAs with Fast-Settling and Large Capacitive Loads 122
A Schmitt trigger by means of CCII+ 121
Robust design of CMOS amplifiers oriented to settling-time specification 121
Dynamic-biased capacitor-free NMOS LDO voltage regulator 120
Area-efficient design of three- and four-stage voltage multipliers for power integrated circuits 120
Signal Amplifiers 119
A New Accurate Analytical Expression for the SiPM Transient Response to Single Photons 119
A New Advanced RNMC Technique with Dual-Active Current and Voltage Buffers for Low-Power High-Load Three-Stage Amplifiers 118
PERFORMANCE EVALUATION OF ADIABATIC GATES 116
Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation 115
Advances in Reversed Nested Miller Compensation 114
A New Enhanced PSPICE Implementation of the Equivalent Circuit Model of SiPM Detectors 113
CML RING OSCILLATORS: OSCILLATION FREQUENCY 112
An Efficient RNM Compensation Topology with Voltage Buffer and Nulling Resistors for Large-Capacitive-Load Three-Stage OTAs 111
AN ACCURATE OFFSET–COMPENSATED CURRENT COMPARATOR 111
Optimized Charge Pump with Clock Booster for Reduced Rise Time or Silicon Area 111
Optimized Design of an N-th Order Dickson Voltage Multiplier 110
An Accurate Ultra-Compact I–V Model for Nanometer MOS Transistors With Applications on Digital Circuits 110
Approach to the design of low-voltage SC filters 110
Analytical Figure of Merit Evaluation of RNMC Networks for Low-Power Three-Stage OTAs 109
"Modular Low-Power, High-Speed CMOS Analog-to-Digital Converter for Embedded Systems" (di Keh-La Lin, A. Kemna, B. Hosticka), in IEEE Circuits & Devices Magazine 108
A Fuzzy A/D Converter by Means of Current-Mode Approach 107
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes 106
DOUBLE AND TRIPLE CHARGE PUMPS WITH MOS DIODES - DYNAMIC-MODELS TO AN OPTIMIZED DESIGN 106
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies 106
Variations in Nanometer CMOS Flip-Flops: Part I – Timing and Impact of Process Variations 105
A Novel Low-Power High-Speed Rail-to-Rail Class-B Buffer Amplifier for LCD Output Drivers 105
A Low-Voltage Low-Power Voltage Reference Based on Subthreshold MOSFETs 105
Pseudo-Random Sequence Generators with Improved Inviolability Performance 103
Analysis and optimization of a novel CMOS multiplier 103
A Fuzzy Controller for Step-Up DC/DC Converters 102
The noise performance of Miller CMOS operational amplifiers with current-buffer frequency compensation 101
Introduzione ai Dispositivi Elettronici 101
Introduzione ai Convertitori A/D del tipo Sigma-Delta 101
DESIGN METHODOLOGY AND ADVANCES IN NESTED-MILLER COMPENSATION 100
An approach to test the open-loop parameters of feedback amplifiers 100
Guest editorial 99
DOUBLE AND TRIPLE CHARGE PUMP FOR POWER IC - IDEAL DYNAMIC-MODELS TO AN OPTIMIZED DESIGN 99
A High-Speed Low-Power Output Buffer Amplifier for Large-Size LCD Applications 99
Design procedures for three-stage CMOS OTAs with nested-Miller compensation 99
Single-miller all-passive compensation network for three-stage OTAs 97
IMPROVED BEHAVIORAL AND DESIGN MODEL OF AN N-TH ORDER CHARGE PUMP 96
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time 96
CMOS CURRENT AMPLIFIERS 96
DOUBLE AND TRIPLE CHARGE PUMP FOR POWER IC - DYNAMIC-MODELS WHICH TAKE PARASITIC EFFECTS INTO ACCOUNT 96
A New Compact Low-Power High-Speed Rail-to-Rail Class-B Buffer for LCD Applications 96
A Generalization of Miller Formulae for Nonlinear Feedback Networks 95
Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW 95
Behavioral modeling of statistical phenomena of single-photon avalanche diodes 94
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulator 94
MODELING OF SOURCE COUPLED LOGIC GATES 93
HIGH LINEARITY CMOS CURRENT OUTPUT STAGE 93
AN OPTIMIZED COMPENSATION STRATEGY FOR 2-STAGE CMOS OP AMPS 93
NEW CMOS CURRENT MIRRORS WITH IMPROVED HIGH-FREQUENCY RESPONSE 93
Switched capacitor compatible minimum-maximum function 93
A compensation strategy for two-stage CMOS opamps based on current buffer 93
GAIN-COMPENSATED SAMPLE-AND-HOLD CIRCUIT FOR HIGH-FREQUENCY APPLICATION 93
Memorie Ferroelettriche 92
Improved Power-Efficient RNMC Technique with Voltage Buffer and Nulling Resistors for Low-Power High-Load Three-Stage Amplifiers 92
Design and Comparison of Very Low-Voltage CMOS Output Stages 92
Power Supply Rejection of Widlar Bandgap Voltage Reference 91
A high-performance charge pump topology for very-low-voltage applications 91
Resistance of Feedback Amplifiers: A Novel Representation 90
Analytical Comparison of Frequency Compensation Techniques in Three-Stage Amplifiers 90
Improved Low-Power High-Speed Buffer Amplifier with Slew-Rate Enhancement for LCD Applications 90
Distortion analysis of Miller-compensated three-stage amplifiers 90
Solutions for CMOS Current Amplifiers with High-Drive Output Stage 90
Guidelines for Designing Class-AB Output Stages 90
A Detailed Analysis of Power-Supply Noise Attenuation in Bandgap Voltage References 90
Charge Pumps for Ultra-Low-Power Applications: Analysis, Design and New Solutions 90
Nonidealities of Tow-Thomas Biquads Using VOA- and CFOA-Based Miller Integrators 89
Design procedure for two-stage CMOS transconductance operational amplifiers: A tutorial 89
An Approach to the Design of Low-Voltage SC Filters 88
A new method for evaluating harmonic distortion in push-pull output stages 88
Analysis and Optimization of a Low-Voltage Class-AB Output Stage 88
Totale 18.316
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Categoria #
all - tutte 128.424
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 128.424
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20211.110 0 0 0 0 0 42 257 21 288 14 231 257
2021/20223.166 425 451 9 40 538 5 450 103 312 32 105 696
2022/20234.582 473 164 62 309 392 845 28 880 1.205 28 128 68
2023/20242.496 106 440 100 106 58 281 51 95 15 542 417 285
2024/20257.708 240 851 505 524 1.817 813 209 316 505 872 446 610
2025/202616.894 900 1.534 9.059 1.055 2.309 2.037 0 0 0 0 0 0
Totale 41.352