IRIS
GIUSTOLISI, Gianluca
 Distribuzione geografica
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Continente #
NA - Nord America 5.429
AS - Asia 2.983
EU - Europa 2.936
SA - Sud America 520
AF - Africa 411
Continente sconosciuto - Info sul continente non disponibili 339
OC - Oceania 31
AN - Antartide 1
Totale 12.650
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Nazione #
US - Stati Uniti d'America 5.183
SG - Singapore 1.406
CN - Cina 819
IT - Italia 790
RU - Federazione Russa 704
IE - Irlanda 416
BR - Brasile 414
UA - Ucraina 295
VN - Vietnam 277
CI - Costa d'Avorio 238
CA - Canada 186
FR - Francia 165
NL - Olanda 144
KR - Corea 94
IN - India 78
DE - Germania 77
GB - Regno Unito 74
SE - Svezia 72
BD - Bangladesh 67
HK - Hong Kong 58
NG - Nigeria 57
FI - Finlandia 55
SN - Senegal 53
AR - Argentina 40
JP - Giappone 27
CH - Svizzera 26
TW - Taiwan 25
MX - Messico 23
CZ - Repubblica Ceca 18
PL - Polonia 18
AU - Australia 17
IQ - Iraq 17
AT - Austria 15
EC - Ecuador 15
PK - Pakistan 15
ES - Italia 14
NZ - Nuova Zelanda 14
EG - Egitto 13
TR - Turchia 13
CO - Colombia 12
UZ - Uzbekistan 11
BJ - Benin 10
ID - Indonesia 10
VE - Venezuela 10
JM - Giamaica 9
PE - Perù 9
ZA - Sudafrica 9
BE - Belgio 7
CL - Cile 7
JO - Giordania 7
PH - Filippine 7
PY - Paraguay 7
DZ - Algeria 6
EU - Europa 6
KE - Kenya 6
MA - Marocco 6
SA - Arabia Saudita 6
TN - Tunisia 6
ET - Etiopia 5
GR - Grecia 5
MY - Malesia 5
NP - Nepal 5
TH - Thailandia 5
AE - Emirati Arabi Uniti 4
AL - Albania 4
BY - Bielorussia 4
IL - Israele 4
LB - Libano 4
MD - Moldavia 4
SV - El Salvador 4
AZ - Azerbaigian 3
BO - Bolivia 3
CR - Costa Rica 3
GT - Guatemala 3
HN - Honduras 3
IR - Iran 3
KZ - Kazakistan 3
LT - Lituania 3
NI - Nicaragua 3
NO - Norvegia 3
RO - Romania 3
TT - Trinidad e Tobago 3
BB - Barbados 2
BG - Bulgaria 2
DK - Danimarca 2
EE - Estonia 2
GA - Gabon 2
HR - Croazia 2
HU - Ungheria 2
KG - Kirghizistan 2
MT - Malta 2
OM - Oman 2
PR - Porto Rico 2
RS - Serbia 2
UY - Uruguay 2
AQ - Antartide 1
AW - Aruba 1
BA - Bosnia-Erzegovina 1
BN - Brunei Darussalam 1
BZ - Belize 1
Totale 12.303
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Città #
Dallas 966
Santa Clara 886
Singapore 824
Dublin 400
Chandler 383
San Jose 353
Jacksonville 332
Moscow 274
Abidjan 238
Ashburn 228
Beijing 175
Council Bluffs 166
Boardman 148
Amsterdam 120
Catania 116
Chicago 113
Los Angeles 111
Hefei 110
Nanjing 108
Cambridge 106
Lawrence 106
Civitanova Marche 105
Andover 103
Lauterbourg 101
Toronto 98
Seoul 93
Dong Ket 86
Milan 63
Hanoi 59
Ho Chi Minh City 58
Des Moines 56
Dakar 53
Helsinki 47
Hong Kong 47
Palermo 45
New York 41
San Mateo 39
São Paulo 37
Columbus 36
Wilmington 36
Lagos 35
The Dalles 33
Hebei 31
Saint Petersburg 30
Nanchang 29
Shenyang 28
Changsha 26
Redondo Beach 26
Tianjin 24
Rome 23
Ottawa 22
Buffalo 21
Nuremberg 20
Jiaxing 19
Orem 19
Brno 18
Brooklyn 18
Munich 18
Chennai 17
Montreal 17
Naples 17
Dhaka 16
Rio de Janeiro 16
Tremestieri Etneo 16
Abuja 15
New Taipei City 15
Messina 14
Bengaluru 13
Brasília 12
Tokyo 12
Warsaw 12
Porto Alegre 11
Turin 11
Boston 10
Cotonou 10
London 10
Marseille 10
Seattle 10
Biên Hòa 9
Cairo 9
Houston 9
Kingston 9
Monte San Vito 9
San Francisco 9
Stockholm 9
Auckland 8
Belo Horizonte 8
Delft 8
Denver 8
Haiphong 8
Hangzhou 8
Liberty Lake 8
Mexico City 8
Sortino 8
Washington 8
Amman 7
Curitiba 7
Jinan 7
Mascalucia 7
Mumbai 7
Totale 8.348
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Nome #
Design guidelines of CMOS class-AB output stages: a tutorial 230
A 3- V, 72-μ W and 0.042-mm2 Active-Area Dynamic Comparator in Flexible TFT Technology 221
A 1-V CMOS Output Stage with High Linearity 211
A 28-nm CMOS 60-GHz LNA for OOK Low-Power Receivers 207
1.2-V CMOS op-amp with a dynamically biased output stage 193
A Clock Boosted Charge Pump with Reduced Rise Time 190
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers 186
1.5V power supply CMOS voltage squarer 182
A 1.5 CMOS Voltage Multiplier 173
A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications 168
A 28-nm CMOS Low-Power/Low-Voltage 60-GHz LNA for High-Speed Communication 165
Dynamic-biased capacitor-free NMOS LDO voltage regulator 159
1V CMOS output stage with excellent linearity 159
A New Method for Harmonic Distortion Analysis in Class-AB Stages 153
An Accurate Ultra-Compact I–V Model for Nanometer MOS Transistors With Applications on Digital Circuits 146
A gm/ID-Based Design Strategy for IoT and Ultra-Low-Power OTAs with Fast-Settling and Large Capacitive Loads 146
Analysis and optimization of a novel CMOS multiplier 142
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier 140
A Biasing Approach to design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs 139
Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation 137
Robust design of CMOS amplifiers oriented to settling-time specification 135
Introduzione ai Convertitori A/D del tipo Sigma-Delta 128
A Detailed Analysis of Power-Supply Noise Attenuation in Bandgap Voltage References 127
A 5 mW 28 nm CMOS Low-Noise Amplifier with Transformer-Based Electrostatic Discharge Protection for 60 GHz Applications 126
A Low-Voltage Low-Power Voltage Reference Based on Subthreshold MOSFETs 125
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes 123
Theoretical and experimental study of the role of cell-cell dipole interaction in dielectrophoretic devices: application to polynomial electrodes 122
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies 122
A Fuzzy A/D Converter by Means of Current-Mode Approach 120
Optimized Charge Pump with Clock Booster for Reduced Rise Time or Silicon Area 120
Guidelines for Designing Class-AB Output Stages 119
Introduzione ai Dispositivi Elettronici 118
Approach to the design of low-voltage SC filters 117
A Fuzzy Controller for Step-Up DC/DC Converters 117
Fractional Order Differ-Integral Operator in Integrated Technology 112
An approach to test the open-loop parameters of feedback amplifiers 112
Behavioral modeling of statistical phenomena of single-photon avalanche diodes 111
A Three-Stage Operational Transconductance Amplifier in TFT Flexible-Substrate Process 110
Device Modeling for Digital Circuits 109
High-dimensional dynamics in a single-transistor oscillator containing Feynman-Sierpiński resonators: Effect of fractal depth and irregularity 109
Switched capacitor compatible minimum-maximum function 106
Design and Comparison of Very Low-Voltage CMOS Output Stages 106
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time 106
A fuzzy membership function circuit in SC technique 105
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulator 104
Power Supply Rejection of Widlar Bandgap Voltage Reference 103
A new method for evaluating harmonic distortion in push-pull output stages 103
Analysis and Optimization of a Low-Voltage Class-AB Output Stage 103
Hybrid Full Adders: Optimized Design, Critical Review and Comparison in the Energy-Delay Space 102
A Comparative Analysis of 60-GHz LNAs for Low-Power mm-Wave Receivers 102
CMRR frequency response of CMOS operational transconductance amplifiers 102
Simple and Accurate Model for the Propagation Delay in MCML Gates 101
Resistance of Feedback Amplifiers: A Novel Representation 101
HIGH–DRIVE CMOS CURRENT–FEEDBACK OPAMP 101
Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-Adders 100
An Approach to the Design of Low-Voltage SC Filters 99
A New Topology for the Implementation of Analog Maximum and Minimum Functions 98
Resolution of a Current-Mode Algorithmic Analog-to-Digital Converter 97
Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior 97
High-linear class AB transconductor for high-frequency applications 96
A switched-capacitor compatible membership function block 96
Study of the role of particle-particle dipole interaction in dielectrophoretic devices for biomarkers identification 96
An ultra-compact MOS model in nanometer technologies 95
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model 95
Design of low-voltage low-power SC filters for high-frequency applications 95
Design of CMOS three-stage amplifiers for near-to-minimum settling-time 95
Sample frequency effects on a new SC realization of Fractional Order Integrator 94
An efficient fuzzy controller architecture in SC technique 93
Exploiting the High-Frequency Performance of Low-Voltage Low-Power SC Filters 93
Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads 91
Analysis, modelling and optimization of a gain boosted telescopic amplifier 90
A Novel 1.5-V CMOS Mixer 88
Analysis and optimization of gain-boosted telescopic amplifiers 88
Design of CMOS OTAs with Settling-Time Constraints 88
In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers 87
Frequency Behaviour of CMRR in One-Stage CMOS OTA 86
Settling-time oriented OTA design through the approximation of the ideal delay 86
Statistical Analysis of CMOS Current Reference 85
Techniques for evaluating harmonic distortion in class-AB output stages: A tutorial 84
A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers 83
Verilog-a Modeling of SPAD Statistical Phenomena 83
On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique 83
LDO Compensation Strategy based on Current Buffer/Amplifiers 81
Comparison of Methods for Predicting Distortion in Class-AB Stages 81
Statistical analysis of the resolution in a current-mode ADC 80
A Novel Method for Determining Open-Loop Parameters in Feedback Amplifiers 80
Analysis of power supply noise attenuation in a PTAT current source 80
A Novel CMOS Voltage Squarer 80
Two-Stage OTA Design Based on Settling-Time Constraints 79
A Novel High-speed Cascode Current Mirror Compensation 79
Design of three-stage OTAs from settling-time and slew-rate constraints 79
Behavioral model of silicon photo-multipliers suitable for transistor-level circuit simulation 79
Logic Gates Dynamic Modeling by Means of an Ultra-Compact MOS Model 78
VLSI Implementation of a Double-Layer Single Cell RD-CNN for Motion Control 78
Low-voltage LDO Compensation Strategy based on Current Amplifiers 78
Compensation strategy for high-speed three-stage switched-capacitor amplifiers 77
NMOS Low Drop-Out Regulator with Dynamic Biasing 77
Detailed Frequency Analysis of Power Supply Rejection in Brokaw Bandgap 77
Statistical modelling and design guidelines of CMOS current references 77
Design Methodology of the Output Power Stage of a Step-Down DC-DC Converter 76
Totale 11.251
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Categoria #
all - tutte 41.472
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 41.472
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022657 0 110 4 11 120 3 109 19 71 6 29 175
2022/20231.264 111 65 20 105 101 221 8 247 318 8 37 23
2023/2024908 42 257 30 23 12 80 46 15 16 150 128 109
2024/20252.580 123 290 129 175 628 362 91 110 126 248 138 160
2025/20265.191 310 300 1.075 340 671 828 540 150 389 284 180 124
2026/2027431 217 214 0 0 0 0 0 0 0 0 0 0
Totale 12.650