IRIS
GIUSTOLISI, Gianluca
 Distribuzione geografica
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Continente #
NA - Nord America 1.796
EU - Europa 1.350
AS - Asia 487
AF - Africa 222
OC - Oceania 30
SA - Sud America 8
Continente sconosciuto - Info sul continente non disponibili 6
Totale 3.899
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Nazione #
US - Stati Uniti d'America 1.658
IE - Irlanda 411
CN - Cina 325
UA - Ucraina 280
IT - Italia 277
CI - Costa d'Avorio 163
CA - Canada 136
RU - Federazione Russa 103
VN - Vietnam 86
FR - Francia 55
SN - Senegal 52
DE - Germania 44
FI - Finlandia 44
GB - Regno Unito 37
SE - Svezia 32
CH - Svizzera 23
IN - India 19
AU - Australia 16
NZ - Nuova Zelanda 14
JP - Giappone 12
NL - Olanda 12
SG - Singapore 11
AT - Austria 10
HK - Hong Kong 7
UZ - Uzbekistan 7
EU - Europa 6
PK - Pakistan 5
PL - Polonia 5
TW - Taiwan 5
LB - Libano 4
AR - Argentina 3
BR - Brasile 3
BY - Bielorussia 3
DZ - Algeria 3
GR - Grecia 3
TR - Turchia 3
HU - Ungheria 2
MX - Messico 2
NG - Nigeria 2
PE - Perù 2
RS - Serbia 2
BE - Belgio 1
BG - Bulgaria 1
CY - Cipro 1
DK - Danimarca 1
EG - Egitto 1
ES - Italia 1
ET - Etiopia 1
HR - Croazia 1
IR - Iran 1
MT - Malta 1
MY - Malesia 1
RO - Romania 1
Totale 3.899
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Città #
Dublin 395
Chandler 383
Jacksonville 331
Abidjan 163
Nanjing 108
Cambridge 106
Lawrence 106
Andover 103
Toronto 91
Dong Ket 86
Catania 69
Des Moines 56
Ashburn 53
Dakar 52
Helsinki 40
San Mateo 39
Wilmington 36
Boardman 31
Hebei 31
Saint Petersburg 30
Nanchang 29
Shenyang 28
Changsha 26
Tianjin 24
Ottawa 22
Milan 21
Jiaxing 19
Nuremberg 16
Palermo 16
Marseille 9
Auckland 8
Liberty Lake 8
Moscow 8
Hangzhou 7
Jinan 7
Nakamaru 7
Rome 7
Beijing 6
Bengaluru 6
Duncan 6
Falls Church 6
Grafing 6
Montreal 6
Ningbo 6
Norwalk 6
Taizhou 6
Arona 5
Brisbane 5
Delft 5
Geneva 5
Guangzhou 5
Pune 5
San Giuliano Milanese 5
Seattle 5
Thrissur 5
Turin 5
Zhengzhou 5
Central 4
Frankfurt Am Main 4
Houston 4
London 4
Messina 4
Siracusa 4
Sydney 4
Torino 4
Washington 4
Amsterdam 3
Bad Kreuznach 3
Batna City 3
Birmingham 3
Den Haag 3
Gravina di Catania 3
Istanbul 3
Kunming 3
Melbourne 3
Minsk 3
Pavia 3
Plano 3
Tokyo 3
Abuja 2
Acireale 2
Ann Arbor 2
Bad Bellingen 2
Belgrade 2
Bergamo 2
Budapest 2
Castello di Cisterna 2
Chennai 2
Christchurch 2
Edinburgh 2
Faisalabad 2
Gambolò 2
Grugliasco 2
Halifax 2
Hamilton 2
Hanover 2
Islamabad 2
Ivrea 2
Kishinecho 2
Lausanne 2
Totale 2.797
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Nome #
A 1-V CMOS Output Stage with High Linearity 95
Robust design of CMOS amplifiers oriented to settling-time specification 73
1.2-V CMOS op-amp with a dynamically biased output stage 73
A 1.5 CMOS Voltage Multiplier 67
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes 63
1.5V power supply CMOS voltage squarer 63
Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation 63
A Clock Boosted Charge Pump with Reduced Rise Time 61
Design guidelines of CMOS class-AB output stages: a tutorial 60
A New Method for Harmonic Distortion Analysis in Class-AB Stages 59
Dynamic-biased capacitor-free NMOS LDO voltage regulator 59
Approach to the design of low-voltage SC filters 59
Analysis and optimization of a novel CMOS multiplier 58
An Accurate Ultra-Compact I–V Model for Nanometer MOS Transistors With Applications on Digital Circuits 57
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies 55
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers 53
An approach to test the open-loop parameters of feedback amplifiers 52
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time 51
Behavioral modeling of statistical phenomena of single-photon avalanche diodes 50
Introduzione ai Convertitori A/D del tipo Sigma-Delta 50
Optimized Charge Pump with Clock Booster for Reduced Rise Time or Silicon Area 50
Switched capacitor compatible minimum-maximum function 49
Introduzione ai Dispositivi Elettronici 49
An Approach to the Design of Low-Voltage SC Filters 48
1V CMOS output stage with excellent linearity 48
Design and Comparison of Very Low-Voltage CMOS Output Stages 47
A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications 47
Theoretical and experimental study of the role of cell-cell dipole interaction in dielectrophoretic devices: application to polynomial electrodes 46
Guidelines for Designing Class-AB Output Stages 45
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulator 44
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier 44
Power Supply Rejection of Widlar Bandgap Voltage Reference 43
Resistance of Feedback Amplifiers: A Novel Representation 42
A Biasing Approach to design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs 42
A Fuzzy Controller for Step-Up DC/DC Converters 41
An ultra-compact MOS model in nanometer technologies 40
A New Topology for the Implementation of Analog Maximum and Minimum Functions 40
Analysis and Optimization of a Low-Voltage Class-AB Output Stage 40
CMRR frequency response of CMOS operational transconductance amplifiers 40
Exploiting the High-Frequency Performance of Low-Voltage Low-Power SC Filters 40
Analysis, modelling and optimization of a gain boosted telescopic amplifier 40
A gm/ID-Based Design Strategy for IoT and Ultra-Low-Power OTAs with Fast-Settling and Large Capacitive Loads 40
Analysis of Power Supply Gain of CMOS Bandgap References 39
Resolution of a Current-Mode Algorithmic Analog-to-Digital Converter 39
Fractional Order Differ-Integral Operator in Integrated Technology 38
HIGH–DRIVE CMOS CURRENT–FEEDBACK OPAMP 38
A Novel Method for Determining Open-Loop Parameters in Feedback Amplifiers 38
Device Modeling for Digital Circuits 37
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model 37
High-linear class AB transconductor for high-frequency applications 37
Detailed Frequency Analysis of Power Supply Rejection in Brokaw Bandgap 37
Analysis of power supply noise attenuation in a PTAT current source 37
Design of CMOS OTAs with Settling-Time Constraints 37
Analysis and optimization of gain-boosted telescopic amplifiers 36
Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads 36
A Fuzzy A/D Converter by Means of Current-Mode Approach 35
A switched-capacitor compatible membership function block 34
Comparison of Methods for Predicting Distortion in Class-AB Stages 34
An efficient fuzzy controller architecture in SC technique 33
NMOS Low Drop-Out Regulator with Dynamic Biasing 33
On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique 33
Techniques for evaluating harmonic distortion in class-AB output stages: A tutorial 33
A Low-Voltage Low-Power Voltage Reference Based on Subthreshold MOSFETs 33
Study of the role of particle-particle dipole interaction in dielectrophoretic devices for biomarkers identification 33
Logic Gates Dynamic Modeling by Means of an Ultra-Compact MOS Model 32
Verilog-a Modeling of SPAD Statistical Phenomena 32
Design of low-voltage low-power SC filters for high-frequency applications 32
In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers 32
Behavioral model of silicon photo-multipliers suitable for transistor-level circuit simulation 31
Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior 31
Compensation strategy for high-speed three-stage switched-capacitor amplifiers 30
Two-Stage OTA Design Based on Settling-Time Constraints 30
A Novel 1.5-V CMOS Mixer 30
A fuzzy membership function circuit in SC technique 30
Sample frequency effects on a new SC realization of Fractional Order Integrator 30
Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-Adders 29
A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers 29
Analog Fuzzy Controller in SC Technique 29
Settling-time oriented OTA design through the approximation of the ideal delay 29
Design of CMOS three-stage amplifiers for near-to-minimum settling-time 29
Statistical analysis of the resolution in a current-mode ADC 28
LDO Compensation Strategy based on Current Buffer/Amplifiers 28
A new voltage reference topology based on subthreshold MOSFETs 28
Harmonic distortion in single-stage amplifiers 28
A new method for evaluating harmonic distortion in push-pull output stages 27
Statistical modelling and design guidelines of CMOS current references 27
High-dimensional dynamics in a single-transistor oscillator containing Feynman-Sierpiński resonators: Effect of fractal depth and irregularity 27
Introduction to device modeling 26
A novel 1-V class-AB transconductor for improving speed performance in SC applications 26
A Novel CMOS Voltage Squarer 26
A Novel High-speed Cascode Current Mirror Compensation 25
Frequency Behaviour of CMRR in One-Stage CMOS OTA 25
Current-mode A/D fuzzy converter 25
A Detailed Analysis of Power-Supply Noise Attenuation in Bandgap Voltage References 25
Theoretical and experimental study of the kinetics of particle chains near electrodes in dielectrophoretic devices 25
Low-voltage LDO Compensation Strategy based on Current Amplifiers 25
Verilog-a modeling of Silicon Photo-Multipliers 24
Statistical Analysis of CMOS Current Reference 24
Efficient design strategy for optimizing the settling time in three-stage amplifiers including small-and large-signal behavior 24
VLSI Implementation of a Double-Layer Single Cell RD-CNN for Motion Control 23
Totale 3.974
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Categoria #
all - tutte 13.014
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 13.014
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/201932 0 0 0 0 0 0 0 0 0 13 1 18
2019/2020517 218 42 34 0 33 7 49 2 50 2 56 24
2020/2021602 5 45 77 4 175 11 57 11 54 9 47 107
2021/2022756 99 110 4 11 120 3 109 19 71 6 29 175
2022/20231.264 111 65 20 105 101 221 8 247 318 8 37 23
2023/2024660 42 257 30 23 12 80 46 15 16 139 0 0
Totale 4.200