IRIS
GIUSTOLISI, Gianluca
 Distribuzione geografica
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Continente #
NA - Nord America 4.401
AS - Asia 2.213
EU - Europa 1.898
SA - Sud America 426
AF - Africa 325
OC - Oceania 30
Continente sconosciuto - Info sul continente non disponibili 6
AN - Antartide 1
Totale 9.300
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Nazione #
US - Stati Uniti d'America 4.231
SG - Singapore 1.104
CN - Cina 700
IT - Italia 623
IE - Irlanda 414
BR - Brasile 363
UA - Ucraina 290
CI - Costa d'Avorio 236
RU - Federazione Russa 164
VN - Vietnam 154
CA - Canada 148
DE - Germania 67
FR - Francia 59
GB - Regno Unito 57
IN - India 55
FI - Finlandia 53
SN - Senegal 52
KR - Corea 43
SE - Svezia 39
NL - Olanda 36
AR - Argentina 28
HK - Hong Kong 26
CH - Svizzera 25
TW - Taiwan 21
CZ - Repubblica Ceca 18
JP - Giappone 18
AU - Australia 16
BD - Bangladesh 16
AT - Austria 14
IQ - Iraq 14
MX - Messico 14
NZ - Nuova Zelanda 14
BJ - Benin 10
PK - Pakistan 10
UZ - Uzbekistan 9
PL - Polonia 8
EC - Ecuador 7
PE - Perù 7
TR - Turchia 7
DZ - Algeria 6
EU - Europa 6
VE - Venezuela 6
ES - Italia 5
PY - Paraguay 5
ZA - Sudafrica 5
GR - Grecia 4
ID - Indonesia 4
JO - Giordania 4
LB - Libano 4
BY - Bielorussia 3
CL - Cile 3
CO - Colombia 3
EG - Egitto 3
ET - Etiopia 3
NO - Norvegia 3
NP - Nepal 3
TN - Tunisia 3
AE - Emirati Arabi Uniti 2
AZ - Azerbaigian 2
BG - Bulgaria 2
BO - Bolivia 2
GA - Gabon 2
HR - Croazia 2
HU - Ungheria 2
IL - Israele 2
IR - Iran 2
JM - Giamaica 2
KE - Kenya 2
LT - Lituania 2
NG - Nigeria 2
PH - Filippine 2
RS - Serbia 2
SA - Arabia Saudita 2
AQ - Antartide 1
BE - Belgio 1
BN - Brunei Darussalam 1
CR - Costa Rica 1
CY - Cipro 1
DK - Danimarca 1
DO - Repubblica Dominicana 1
EE - Estonia 1
GE - Georgia 1
HN - Honduras 1
KG - Kirghizistan 1
KZ - Kazakistan 1
MA - Marocco 1
MK - Macedonia 1
MT - Malta 1
MY - Malesia 1
OM - Oman 1
PA - Panama 1
RO - Romania 1
SR - Suriname 1
SV - El Salvador 1
TH - Thailandia 1
TL - Timor Orientale 1
TT - Trinidad e Tobago 1
UY - Uruguay 1
Totale 9.300
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Città #
Dallas 959
Santa Clara 858
Singapore 580
Dublin 398
Chandler 383
Jacksonville 332
Abidjan 236
Boardman 148
Beijing 144
Ashburn 115
Hefei 110
Nanjing 108
Cambridge 106
Lawrence 106
Civitanova Marche 105
Catania 104
Andover 103
Chicago 101
Toronto 93
Dong Ket 86
Los Angeles 86
Des Moines 56
Dakar 52
Council Bluffs 48
Moscow 47
Helsinki 45
Seoul 42
Milan 41
San Mateo 39
Palermo 37
Wilmington 36
Columbus 34
São Paulo 34
The Dalles 33
Hebei 31
Saint Petersburg 30
Nanchang 29
Ho Chi Minh City 28
Shenyang 28
Changsha 26
Redondo Beach 26
Tianjin 24
Ottawa 22
Amsterdam 19
Hong Kong 19
Jiaxing 19
Brno 18
Munich 18
Nuremberg 17
Buffalo 16
Tremestieri Etneo 16
New Taipei City 15
New York 15
Hanoi 14
Rio de Janeiro 13
Rome 13
Montreal 12
Messina 11
Bengaluru 10
Brasília 10
Cotonou 10
Brooklyn 9
Chennai 9
Marseille 9
Monte San Vito 9
Auckland 8
Boston 8
Delft 8
Liberty Lake 8
Porto Alegre 8
Seattle 8
Stockholm 8
Tokyo 8
Belo Horizonte 7
Dhaka 7
Hangzhou 7
Jinan 7
London 7
Nakamaru 7
San Jose 7
Turin 7
Duncan 6
Falls Church 6
Grafing 6
Guangzhou 6
Naples 6
Ningbo 6
Norwalk 6
Taizhou 6
Visakhapatnam 6
Washington 6
Zhengzhou 6
Arona 5
Baghdad 5
Biên Hòa 5
Brisbane 5
Curitiba 5
Geneva 5
Goiânia 5
Houston 5
Totale 6.576
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Nome #
A 3- V, 72-μ W and 0.042-mm2 Active-Area Dynamic Comparator in Flexible TFT Technology 169
A 1-V CMOS Output Stage with High Linearity 166
A 28-nm CMOS 60-GHz LNA for OOK Low-Power Receivers 157
Design guidelines of CMOS class-AB output stages: a tutorial 150
1.2-V CMOS op-amp with a dynamically biased output stage 149
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers 143
1.5V power supply CMOS voltage squarer 141
A Clock Boosted Charge Pump with Reduced Rise Time 137
A 1.5 CMOS Voltage Multiplier 131
A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications 122
A New Method for Harmonic Distortion Analysis in Class-AB Stages 120
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier 120
1V CMOS output stage with excellent linearity 116
Dynamic-biased capacitor-free NMOS LDO voltage regulator 115
Robust design of CMOS amplifiers oriented to settling-time specification 115
Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation 110
A gm/ID-Based Design Strategy for IoT and Ultra-Low-Power OTAs with Fast-Settling and Large Capacitive Loads 106
An Accurate Ultra-Compact I–V Model for Nanometer MOS Transistors With Applications on Digital Circuits 105
Approach to the design of low-voltage SC filters 104
Optimized Charge Pump with Clock Booster for Reduced Rise Time or Silicon Area 103
Theoretical and experimental study of the role of cell-cell dipole interaction in dielectrophoretic devices: application to polynomial electrodes 102
Analysis and optimization of a novel CMOS multiplier 101
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes 101
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies 100
Introduzione ai Dispositivi Elettronici 98
A Biasing Approach to design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs 98
Device Modeling for Digital Circuits 97
Introduzione ai Convertitori A/D del tipo Sigma-Delta 95
An approach to test the open-loop parameters of feedback amplifiers 95
High-dimensional dynamics in a single-transistor oscillator containing Feynman-Sierpiński resonators: Effect of fractal depth and irregularity 93
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulator 91
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time 91
Fractional Order Differ-Integral Operator in Integrated Technology 91
Behavioral modeling of statistical phenomena of single-photon avalanche diodes 90
Switched capacitor compatible minimum-maximum function 90
Design and Comparison of Very Low-Voltage CMOS Output Stages 89
A Fuzzy A/D Converter by Means of Current-Mode Approach 89
A Low-Voltage Low-Power Voltage Reference Based on Subthreshold MOSFETs 87
Power Supply Rejection of Widlar Bandgap Voltage Reference 86
A Fuzzy Controller for Step-Up DC/DC Converters 86
Resistance of Feedback Amplifiers: A Novel Representation 85
An Approach to the Design of Low-Voltage SC Filters 85
Guidelines for Designing Class-AB Output Stages 84
A New Topology for the Implementation of Analog Maximum and Minimum Functions 84
Resolution of a Current-Mode Algorithmic Analog-to-Digital Converter 84
Design of CMOS three-stage amplifiers for near-to-minimum settling-time 84
A new method for evaluating harmonic distortion in push-pull output stages 83
CMRR frequency response of CMOS operational transconductance amplifiers 82
Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior 82
Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-Adders 81
An efficient fuzzy controller architecture in SC technique 81
Analysis and Optimization of a Low-Voltage Class-AB Output Stage 81
A 28-nm CMOS Low-Power/Low-Voltage 60-GHz LNA for High-Speed Communication 79
A 5 mW 28 nm CMOS Low-Noise Amplifier with Transformer-Based Electrostatic Discharge Protection for 60 GHz Applications 79
Sample frequency effects on a new SC realization of Fractional Order Integrator 79
An ultra-compact MOS model in nanometer technologies 78
Study of the role of particle-particle dipole interaction in dielectrophoretic devices for biomarkers identification 78
Simple and Accurate Model for the Propagation Delay in MCML Gates 77
A switched-capacitor compatible membership function block 77
Design of low-voltage low-power SC filters for high-frequency applications 77
HIGH–DRIVE CMOS CURRENT–FEEDBACK OPAMP 75
High-linear class AB transconductor for high-frequency applications 75
A Detailed Analysis of Power-Supply Noise Attenuation in Bandgap Voltage References 75
Design of CMOS OTAs with Settling-Time Constraints 75
A fuzzy membership function circuit in SC technique 74
Analysis, modelling and optimization of a gain boosted telescopic amplifier 74
Exploiting the High-Frequency Performance of Low-Voltage Low-Power SC Filters 71
Verilog-a Modeling of SPAD Statistical Phenomena 70
Frequency Behaviour of CMRR in One-Stage CMOS OTA 70
Analysis and optimization of gain-boosted telescopic amplifiers 70
Analysis of power supply noise attenuation in a PTAT current source 70
Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads 70
On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique 69
Statistical modelling and design guidelines of CMOS current references 69
Techniques for evaluating harmonic distortion in class-AB output stages: A tutorial 68
Settling-time oriented OTA design through the approximation of the ideal delay 68
In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers 68
A Novel Method for Determining Open-Loop Parameters in Feedback Amplifiers 67
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model 66
A Novel 1.5-V CMOS Mixer 66
Comparison of Methods for Predicting Distortion in Class-AB Stages 66
Detailed Frequency Analysis of Power Supply Rejection in Brokaw Bandgap 65
Behavioral model of silicon photo-multipliers suitable for transistor-level circuit simulation 65
LDO Compensation Strategy based on Current Buffer/Amplifiers 64
A novel 1-V class-AB transconductor for improving speed performance in SC applications 64
NMOS Low Drop-Out Regulator with Dynamic Biasing 63
Statistical Analysis of CMOS Current Reference 63
A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers 62
Analysis of Power Supply Gain of CMOS Bandgap References 62
A new voltage reference topology based on subthreshold MOSFETs 62
Low-voltage LDO Compensation Strategy based on Current Amplifiers 62
Harmonic distortion in single-stage amplifiers 62
Hybrid Full Adders: Optimized Design, Critical Review and Comparison in the Energy-Delay Space 61
Design Methodology of the Output Power Stage of a Step-Down DC-DC Converter 61
A Three-Stage Operational Transconductance Amplifier in TFT Flexible-Substrate Process 61
A Novel High-speed Cascode Current Mirror Compensation 61
Statistical analysis of the resolution in a current-mode ADC 60
Analog Fuzzy Controller in SC Technique 60
VLSI Implementation of a Double-Layer Single Cell RD-CNN for Motion Control 59
Theoretical and experimental study of the kinetics of particle chains near electrodes in dielectrophoretic devices 59
Totale 8.721
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Categoria #
all - tutte 32.032
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 32.032
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021471 0 0 0 0 175 11 57 11 54 9 47 107
2021/2022756 99 110 4 11 120 3 109 19 71 6 29 175
2022/20231.264 111 65 20 105 101 221 8 247 318 8 37 23
2023/2024908 42 257 30 23 12 80 46 15 16 150 128 109
2024/20252.580 123 290 129 175 628 362 91 110 126 248 138 160
2025/20262.597 310 300 1.075 340 572 0 0 0 0 0 0 0
Totale 9.625